drm/i915: Correctly set SFC capability for video engines
authorVenkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Fri, 6 Nov 2020 01:18:42 +0000 (17:18 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 13 Nov 2020 00:47:30 +0000 (19:47 -0500)
commit5ce6861d36ed5207aff9e5eead4c7cc38a986586
tree19184514eefdf70c8fc2c1a6f1e64cfbeb0e9411
parent0eb0feb9aeac392edf01b525a54acde9b002312e
drm/i915: Correctly set SFC capability for video engines

SFC capability of video engines is not set correctly because i915
is testing for incorrect bits.

Fixes: c5d3e39caa45 ("drm/i915: Engine discovery query")
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: <stable@vger.kernel.org> # v5.3+
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201106011842.36203-1-daniele.ceraolospurio@intel.com
(cherry picked from commit ad18fa0f5f052046cad96fee762b5c64f42dd86a)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/gt/intel_engine_cs.c