linux-2.6-microblaze.git
3 years agohabanalabs: Fix memory leak in error flow of context initialization
Tomer Tayar [Thu, 23 Jul 2020 06:17:57 +0000 (09:17 +0300)]
habanalabs: Fix memory leak in error flow of context initialization

Add a missing free of the cs_pending array in the error flow of context
initialization.

Fixes: c16d45f42b64 ("habanalabs: Use pending CS amount per ASIC")

Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: use no flags on MMU cache invalidation
Tomer Tayar [Sun, 19 Jul 2020 08:00:03 +0000 (11:00 +0300)]
habanalabs: use no flags on MMU cache invalidation

gaudi_mmu_invalidate_cache() doesn't use the flags parameter, and thus
it can be set to 0 when the function is called in the gaudi only files.

Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: enable device before hw_init()
Oded Gabbay [Wed, 15 Jul 2020 18:59:32 +0000 (21:59 +0300)]
habanalabs: enable device before hw_init()

Device is now enabled before the hw_init() because part of the
initialization requires communication with the device firmware to get
information that is required for the initialization itself

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Tomer Tayar <ttayar@habana.ai>
3 years agohabanalabs: create internal CB pool
Ofir Bitton [Mon, 13 Jul 2020 10:36:55 +0000 (13:36 +0300)]
habanalabs: create internal CB pool

Create a device MMU-mapped internal command buffer pool, in order to allow
the driver to allocate CBs for the signal/wait operations
that are fetched by the queues when they are configured with the user's
address space ID.

We must pre-map this internal pool due to performance issues.

This pool is needed for future ASIC support and it is currently unused in
GOYA and GAUDI.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: update hl_boot_if.h from firmware
Oded Gabbay [Mon, 13 Jul 2020 10:11:33 +0000 (13:11 +0300)]
habanalabs: update hl_boot_if.h from firmware

Update the boot interface file from the latest version from firmware.
Defines for secure boot were added.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
3 years agohabanalabs: create common folder
Oded Gabbay [Mon, 13 Jul 2020 09:21:04 +0000 (12:21 +0300)]
habanalabs: create common folder

For internal needs of our CI we need to move all the common code into a
common folder instead of putting them in the root folder of the driver.

Same applies to the common header files under include/

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
3 years agohabanalabs: check for DMA errors when clearing memory
Moti Haimovski [Wed, 24 Jun 2020 16:40:57 +0000 (19:40 +0300)]
habanalabs: check for DMA errors when clearing memory

In GAUDI we use QMAN0 DMA for clearing the MMU memory region
at initialization. if this operation fails it places the DMA in an error
state and then when trying to initialize QMAN0 we fail and erroneously
assume its the QMAN that failed.

This commit adds a check and clear of such DMA errors at initialization so
we will have a better understanding of what went wrong.

Signed-off-by: Moti Haimovski <mhaimovski@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: verify queue can contain all cs jobs
Ofir Bitton [Wed, 8 Jul 2020 07:16:27 +0000 (10:16 +0300)]
habanalabs: verify queue can contain all cs jobs

In order for the user to be aware of wrong inputs, we must return
error in case the amount of jobs per cs exceeds the corresponding
queue size.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: Assign each CQ with its own work queue
Ofir Bitton [Sun, 5 Jul 2020 10:35:51 +0000 (13:35 +0300)]
habanalabs: Assign each CQ with its own work queue

We identified a possible race during job completion when working
with a single multi-threaded work queue. In order to overcome this
race we suggest using a single threaded work queue per completion
queue, hence we guarantee jobs completion in order.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: halt device CPU only upon certain reset
Oded Gabbay [Sun, 5 Jul 2020 12:48:34 +0000 (15:48 +0300)]
habanalabs: halt device CPU only upon certain reset

Currently the driver halts the device CPU in the halt engines function,
which halts all the engines of the ASIC. The problem is that if later on we
stop the reset process (due to inability to clean memory mappings in time),
the CPU will remain in halt mode. This creates many issues, such as
thermal/power control and FLR handling.

Therefore, move the halting of the device CPU to the very end of the reset
process, just before writing to the registers to initiate the reset. In
addition, the driver now needs to send a message to the device F/W to
disable it from sending interrupts to the host machine because during halt
engines function the driver disables the MSI/MSI-X interrupts.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Tomer Tayar <ttayar@habana.ai>
3 years agohabanalabs: remove unused hash
Omer Shpigelman [Tue, 7 Jul 2020 21:29:54 +0000 (00:29 +0300)]
habanalabs: remove unused hash

Remove an old hash that is not in use anymore.

Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: use queue pi/ci in order to determine queue occupancy
Ofir Bitton [Wed, 24 Jun 2020 11:49:43 +0000 (14:49 +0300)]
habanalabs: use queue pi/ci in order to determine queue occupancy

Instead of using the free slots amount on the compute CQ to determine
whether we can submit work to queues, use the queues pi/ci.

This is needed in future ASICs where we don't have CQ per queue.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: configure maximum queues per asic
Ofir Bitton [Tue, 23 Jun 2020 11:50:39 +0000 (14:50 +0300)]
habanalabs: configure maximum queues per asic

Currently the amount of maximum queues is statically configured.
Using a static value is causing redundunt cycles when traversing
all queues and consumes more memory than actually needed.
In this patch we configure each asic with the exact number of
queues needed.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: remove soft-reset support from GAUDI
Oded Gabbay [Fri, 3 Jul 2020 17:58:23 +0000 (20:58 +0300)]
habanalabs: remove soft-reset support from GAUDI

Soft-reset isn't supported in GAUDI. Remove the code that performs it and
print error in case the user wants to do it via sysfs.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Tomer Tayar <ttayar@habana.ai>
3 years agohabanalabs: PCIe iATU refactoring
Ofir Bitton [Mon, 15 Jun 2020 14:45:12 +0000 (17:45 +0300)]
habanalabs: PCIe iATU refactoring

Divide iATU initialization into inbound/outbound methods.
We must separate it in order to enable different match mode
per PCIe region.
In addition, added support for PCI address match mode.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: Extract ECC information from FW
Oded Gabbay [Sun, 17 May 2020 05:20:35 +0000 (08:20 +0300)]
habanalabs: Extract ECC information from FW

ECC (Error Correcting Code) interrupts are going to be handled
by the FW. Hence, we define an interface in which the driver can
obtain the relevant ECC information.
This information is needed for monitoring and can also lead
to a hard reset if ECC error is not correctable.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: Add dropped cs statistics info struct
Ofir Bitton [Thu, 18 Jun 2020 06:51:16 +0000 (09:51 +0300)]
habanalabs: Add dropped cs statistics info struct

Add command submission statistics structure which can be obtained
through the info ioctl. Each drop counter describes the reason for
which the command submission was dropped.
This information is needed for the user to be aware of the specific
reason for which the submitted work was dropped. The user can then
utilize the driver more efficiently.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: extract cpu boot status lookup
Christine Gharzuzi [Tue, 23 Jun 2020 16:21:22 +0000 (19:21 +0300)]
habanalabs: extract cpu boot status lookup

Extract detection of the cpu boot status to a function
to allow code reuse

Signed-off-by: Christine Gharzuzi <cgharzuzi@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: rephrase error messages
Oded Gabbay [Mon, 22 Jun 2020 06:52:22 +0000 (09:52 +0300)]
habanalabs: rephrase error messages

rephrase some error/warning/notice messages to make them more accessible to
ordinary users.

There is no need to print context ASID as the driver currently doesn't
support multiple contexts.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Tomer Tayar <ttayar@habana.ai>
3 years agohabanalabs: Increase queues depth
Ofir Bitton [Mon, 15 Jun 2020 09:09:50 +0000 (12:09 +0300)]
habanalabs: Increase queues depth

After recent concurrent cs amount increase, we must also
increase queues depth since much more concurrent work can be done.
All external queue depths were increased to 4096 as gaudi's
internal queue depths were also increased to 1024.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: rephrase error message
Omer Shpigelman [Sat, 4 Jul 2020 19:51:16 +0000 (22:51 +0300)]
habanalabs: rephrase error message

Rephrase F/W error message to make it more understandable to ordinary
users.

Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: calculate trace frequency from PLL
Adam Aharon [Tue, 26 May 2020 08:04:30 +0000 (11:04 +0300)]
habanalabs: calculate trace frequency from PLL

The profiler needs to know the PLL values for correctly showing the
profiling data. Because our firmware can use different PLL configurations,
we need to read the PLL values from the ASIC to pass them to the profiler.

Signed-off-by: Adam Aharon <aaharon@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: align armcp_packet structure to 8 bytes
Oded Gabbay [Tue, 9 Jun 2020 16:58:44 +0000 (19:58 +0300)]
habanalabs: align armcp_packet structure to 8 bytes

Once there is a 64-bit field in a structure, GCC compiler for ARM aligns
the structure to 8 bytes. In order to avoid confusion when these
structures are being passed between CPUs from different architectures, we
explicitly align the structure to 8 bytes.

Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agouapi/habanalabs: fix some comments
Oded Gabbay [Tue, 9 Jun 2020 13:14:55 +0000 (16:14 +0300)]
uapi/habanalabs: fix some comments

MAP/UNMAP are done also for device memory.

Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: Use mask instead of shift in sync stream registers
Ofir Bitton [Mon, 1 Jun 2020 07:38:46 +0000 (10:38 +0300)]
habanalabs: Use mask instead of shift in sync stream registers

Use proper bitfield masks instead of shifting values when configuring
packets sent to device.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: sync stream generic functionality
Ofir Bitton [Thu, 14 May 2020 15:25:47 +0000 (18:25 +0300)]
habanalabs: sync stream generic functionality

Currently sync stream is limited only for external queues. We want to
remove this constraint by adding a new queue property dedicated for sync
stream. In addition we move the initialization and reset methods to the
common code since we can re-use them with slight changes.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: Use pending CS amount per ASIC
Ofir Bitton [Tue, 2 Jun 2020 09:28:27 +0000 (12:28 +0300)]
habanalabs: Use pending CS amount per ASIC

Training schemes requires much more concurrent command submissions than
inference does. In addition, training command submissions can be completed
in a non serialized manner. Hence, we add support in which each ASIC will
be able to configure the amount of concurrent pending command submissions,
rather than use a predefined amount. This change will enhance performance
by allowing the user to add more concurrent work without waiting for the
previous work to be completed.

Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agohabanalabs: remove rate limiters from GAUDI
Oded Gabbay [Mon, 15 Jun 2020 16:25:57 +0000 (19:25 +0300)]
habanalabs: remove rate limiters from GAUDI

We no longer need to initialize the rate limiters in GAUDI A1.

Reviewed-by: Omer Shpigelman <oshpigelman@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
3 years agomei: hw: don't use one element arrays
Tomas Winkler [Thu, 23 Jul 2020 14:59:27 +0000 (17:59 +0300)]
mei: hw: don't use one element arrays

Replace the single element arrays with a simple value type u8 reserved,
even thought is is not used for dynamically sized trailing elements
it confuses the effort of replacing one-element arrays with
flexible arrays for that purpose.

Link: https://github.com/KSPP/linux/issues/79
Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-7-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: hw: use sizeof of variable instead of struct type
Tomas Winkler [Thu, 23 Jul 2020 14:59:26 +0000 (17:59 +0300)]
mei: hw: use sizeof of variable instead of struct type

Use sizeof(*dev) + sizeof(*hw) instead of
sizeof(struct mei_device) + sizeof(struct mei_me_hw)

There is a possibility of bug when variable type has changed but
corresponding struct passed to the sizeof has not.

Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-6-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: client: use sizeof of variable instead of struct type
Tomas Winkler [Thu, 23 Jul 2020 14:59:25 +0000 (17:59 +0300)]
mei: client: use sizeof of variable instead of struct type

There is a possibility of bug when variable type has changed but
corresponding struct passed to the sizeof has not.

Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-5-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: bus: use sizeof of variable instead of struct type
Tomas Winkler [Thu, 23 Jul 2020 14:59:24 +0000 (17:59 +0300)]
mei: bus: use sizeof of variable instead of struct type

There is a possibility of bug when variable type has changed but
corresponding struct passed to the sizeof has not.

Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-4-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: ioctl: use sizeof of variable instead of struct type
Tomas Winkler [Thu, 23 Jul 2020 14:59:23 +0000 (17:59 +0300)]
mei: ioctl: use sizeof of variable instead of struct type

Use sizeof(connect_data))) instead of
sizeof(struct mei_connect_client_data) when copying data
between user space and kernel.

There is a possibility of bug when variable type has changed but
corresponding struct passed to the sizeof has not.

Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-3-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: hbm: use sizeof of variable instead of struct type
Tomas Winkler [Thu, 23 Jul 2020 14:59:22 +0000 (17:59 +0300)]
mei: hbm: use sizeof of variable instead of struct type

There is a possibility of bug when variable type has changed but
corresponding struct passed to the sizeof has not.

Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200723145927.882743-2-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoRevert "mei: Avoid the use of one-element arrays"
Greg Kroah-Hartman [Thu, 23 Jul 2020 17:29:25 +0000 (19:29 +0200)]
Revert "mei: Avoid the use of one-element arrays"

This reverts commit 3c3b7ddef7879abb2c42422e898145826c79e5f0, as it
turns out Tomas made a better series of patches for this same issue.

Cc: Gustavo A. R. Silva <gustavoars@kernel.org>
Cc: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agobus: fsl-mc: probe the allocatable objects first
Grigore Popescu [Fri, 17 Jul 2020 15:48:00 +0000 (18:48 +0300)]
bus: fsl-mc: probe the allocatable objects first

Because the DPNIs are probed before DPMCPs and other objects that need
to be allocated, messages like "No more resources of type X left" are
printed by the fsl-mc bus driver. This patch resolves the issue by probing
the allocatable objects first and then any other object that may use
them.

Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Link: https://lore.kernel.org/r/20200717154800.17169-4-ioana.ciornei@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agobus: fsl-mc: use raw spin lock to serialize mc cmds
Laurentiu Tudor [Fri, 17 Jul 2020 15:47:59 +0000 (18:47 +0300)]
bus: fsl-mc: use raw spin lock to serialize mc cmds

Replace the spinlock that serializes the MC commands with a raw
spinlock. This is needed for the RT kernel because there are MC
commands sent in interrupt context.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Link: https://lore.kernel.org/r/20200717154800.17169-3-ioana.ciornei@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agobus: fsl-mc: add missing device types
Ioana Ciornei [Fri, 17 Jul 2020 15:47:58 +0000 (18:47 +0300)]
bus: fsl-mc: add missing device types

The MC bus has different types of devices that can be discovered on the
bus. Add the missing device types.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Link: https://lore.kernel.org/r/20200717154800.17169-2-ioana.ciornei@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocardreader/rtsx_pcr.c: use generic power management
Vaibhav Gupta [Mon, 20 Jul 2020 10:17:23 +0000 (15:47 +0530)]
cardreader/rtsx_pcr.c: use generic power management

Drivers should not use legacy power management as they have to manage power
states and related operations, for the device, themselves. This driver was
handling them with the help of PCI helper functions like
pci_save/restore_state(), pci_enable/disable_device(), etc.

With generic PM, all essentials will be handled by the  PCI core. Driver
needs to do only device-specific operations.

The driver was also using pci_enable_wake(...,..., 0) to disable wake. Use
device_wakeup_disable() instead.

Compile-tested only.

Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com>
Link: https://lore.kernel.org/r/20200720101722.145211-1-vaibhavgupta40@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: hpilo: avoid a useless memset
Christophe JAILLET [Sat, 18 Jul 2020 07:02:46 +0000 (09:02 +0200)]
misc: hpilo: avoid a useless memset

Avoid a memset after a call to 'dma_alloc_coherent()'.
This is useless since
commit 518a2f1925c3 ("dma-mapping: zero memory returned from dma_alloc_*")

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20200718070246.338016-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: hpilo: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Sat, 18 Jul 2020 07:02:24 +0000 (09:02 +0200)]
misc: hpilo: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated in 'ilo_ccb_setup()' GFP_ATOMIC must be used
because a spin_lock is hold in 'ilo_open()' before calling
'ilo_ccb_setup()'

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/20200718070224.337964-1-christophe.jaillet@wanadoo.fr
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux...
Greg Kroah-Hartman [Thu, 23 Jul 2020 07:52:10 +0000 (09:52 +0200)]
Merge tag 'phy-for-5.9' of git://git./linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy for 5.9

 - New PHY Drivers:
   - Samsung UFS
   - Qcom USB DWC for ipq806x
   - Xilinx ZynqMP Gigabit Transceiver
   - Qcom USB QMP for IPQ8074
   - BCM63xx USBH

 - Removed:
   - Qcom ufs qmp phy driver

 - Updates:
   - Support for Qcom SM8250 QMP V4 USB3 UNIPHY
   - qcom-snps runtime pm support
   - Cleanup of W=1 warns in the subsystem

* tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (46 commits)
  phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails
  phy: bcm63xx-usbh: Add BCM63xx USBH driver
  dt-bindings: phy: add bcm63xx-usbh bindings
  phy: armada-38x: fix NETA lockup when repeatedly switching speeds
  dt: update Marvell Armada 38x COMPHY binding
  phy: samsung-ufs: Fix IS_ERR argument
  dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support
  dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support
  phy: renesas: rcar-gen3-usb2: exit if request_irq() failed
  phy: renesas: rcar-gen3-usb2: move irq registration to init
  devicetree: bindings: phy: Document ipq806x dwc3 qcom phy
  phy: qualcomm: add qcom ipq806x dwc usb phy driver
  phy: samsung-ufs: add UFS PHY driver for samsung SoC
  dt-bindings: phy: Document Samsung UFS PHY bindings
  phy: sun4i-usb: explicitly include gpio/consumer.h
  phy: stm32: use NULL instead of zero
  phy: exynos5-usbdrd: use correct format for structure description
  phy: rockchip-typec: use correct format for structure description
  phy: xgene: remove unsigned integer comparison with less than zero
  phy: mapphone-mdm6600: Add missing description for some structure fields
  ...

3 years agochar: Replace HTTP links with HTTPS ones
Alexander A. Klimov [Mon, 13 Jul 2020 10:44:53 +0000 (12:44 +0200)]
char: Replace HTTP links with HTTPS ones

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Link: https://lore.kernel.org/r/20200713104453.33414-1-grandmaster@al2klimov.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: Replace HTTP links with HTTPS ones
Alexander A. Klimov [Mon, 13 Jul 2020 16:40:24 +0000 (18:40 +0200)]
misc: Replace HTTP links with HTTPS ones

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Link: https://lore.kernel.org/r/20200713164024.35988-1-grandmaster@al2klimov.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoandroid: binder.h: drop a duplicated word
Randy Dunlap [Sun, 19 Jul 2020 00:27:38 +0000 (17:27 -0700)]
android: binder.h: drop a duplicated word

Drop the repeated word "the" in a comment.

Cc: Arve Hjønnevåg <arve@android.com>
Cc: Todd Kjos <tkjos@android.com>
Cc: Martijn Coenen <maco@android.com>
Cc: Joel Fernandes <joel@joelfernandes.org>
Cc: Hridya Valsaraju <hridya@google.com>
Cc: Suren Baghdasaryan <surenb@google.com>
Cc: devel@driverdev.osuosl.org
Acked-by: Christian Brauner <christian.brauner@ubuntu.com>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20200719002738.20210-1-rdunlap@infradead.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: mic: <linux/mic_bus.h>: drop a duplicated word
Randy Dunlap [Sun, 19 Jul 2020 00:29:43 +0000 (17:29 -0700)]
misc: mic: <linux/mic_bus.h>: drop a duplicated word

Drop the repeated word "the" in a comment.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Sudeep Dutt <sudeep.dutt@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/20200719002943.20624-1-rdunlap@infradead.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: Avoid the use of one-element arrays
Gustavo A. R. Silva [Tue, 14 Jul 2020 21:45:16 +0000 (16:45 -0500)]
mei: Avoid the use of one-element arrays

One-element arrays are being deprecated[1]. Replace the one-element
arrays with a simple value type u8 reserved, once this is just a
placeholder for alignment.

Also, while there, use the preferred form for passing a size of a struct.
The alternative form where struct name is spelled out hurts readability
and introduces an opportunity for a bug when the variable type is changed
but the corresponding sizeof that is passed as argument is not.

[1] https://github.com/KSPP/linux/issues/79

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20200714214516.GA1040@embeddedor
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: Replace HTTP links with HTTPS ones
Alexander A. Klimov [Fri, 17 Jul 2020 18:59:25 +0000 (20:59 +0200)]
mei: Replace HTTP links with HTTPS ones

Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Acked-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20200717185925.84102-1-grandmaster@al2klimov.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomei: hdcp: Replace one-element array with flexible-array member
Gustavo A. R. Silva [Wed, 22 Jul 2020 18:15:34 +0000 (13:15 -0500)]
mei: hdcp: Replace one-element array with flexible-array member

There is a regular need in the kernel to provide a way to declare
having a dynamically sized set of trailing elements in a structure.
Kernel code should always use “flexible array members”[1] for these
cases. The older style of one-element or zero-length arrays should
no longer be used[2].

Also, make use of the array_size() helper instead of the open-coded
version in memcpy(). These sorts of multiplication factors need to
be wrapped in array_size().

And while there, use the preferred form for passing a size of a struct.
The alternative form where struct name is spelled out hurts readability
and introduces an opportunity for a bug when the pointer variable type is
changed but the corresponding sizeof that is passed as argument is not.

[1] https://en.wikipedia.org/wiki/Flexible_array_member
[2] https://github.com/KSPP/linux/issues/79

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20200722181534.GA31357@embeddedor
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agoMerge tag 'fpga-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux...
Greg Kroah-Hartman [Thu, 23 Jul 2020 07:24:26 +0000 (09:24 +0200)]
Merge tag 'fpga-for-5.9' of git://git./linux/kernel/git/mdf/linux-fpga into char-misc-next

Moritz writes:

FPGA Manager changes for 5.9-rc1

Here is the (slightly larger than usual) patch set for the 5.9-rc1 merge
window.

DFL:
- Xu's changes add support for AFU interrupt handling and puts them to
  use for error handling.
- Xu's other change also adds another device-id for the Intel FPGA PAC N3000.
- John's change converts from using get_user_pages() to
  pin_user_pages().
- Gustavo's patch cleans up some of the allocation by using
  struct_size().

Xilinx:
- Luca's changes clean up the xilinx-spi and xilinx-slave-serial drivers
  and updates the comments and dt-bindings to reflect the fact it also
  supports 7 series devices.

Core:
- Tom cleaned up the fpga-bridge / fpga-mgr core by removing some
  dead-stores.

All patches have been reviewed on the mailing list, and have been in the
last few linux-next releases (as part of my for-next branch) without issues.

Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
  fpga: dfl: pci: add device id for Intel FPGA PAC N3000
  Documentation: fpga: dfl: add descriptions for interrupt related interfaces.
  fpga: dfl: afu: add AFU interrupt support
  fpga: dfl: fme: add interrupt support for global error reporting
  fpga: dfl: afu: add interrupt support for port error reporting
  fpga: dfl: introduce interrupt trigger setting API
  fpga: dfl: pci: add irq info for feature devices enumeration
  fpga: dfl: parse interrupt info for feature devices on enumeration
  fpga manager: xilinx-spi: check INIT_B pin during write_init
  dt-bindings: fpga: xilinx-slave-serial: add optional INIT_B GPIO
  fpga: Fix dead store in fpga-bridge.c
  fpga: Fix dead store fpga-mgr.c
  fpga: dfl: Use struct_size() in kzalloc()
  fpga manager: xilinx-spi: remove unneeded, mistyped variables
  fpga manager: xilinx-spi: valid for the 7 Series too
  dt-bindings: fpga: xilinx-slave-serial: valid for the 7 Series too
  fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()

3 years agoMerge tag 'soundwire-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul...
Greg Kroah-Hartman [Thu, 23 Jul 2020 07:12:15 +0000 (09:12 +0200)]
Merge tag 'soundwire-5.9-rc1' of git://git./linux/kernel/git/vkoul/soundwire into char-misc-next

Vinod writes:

soundwire updates for 5.9-rc1

This contains few core changes and bunch of Intel driver updates:

 - Adds definitions for 1.2 spec
 - Sanyog left as a MAINTAINER and Bard took his place while Sanyog
   is a reviewer now.
 - Intel: Lots of updates to stream/dai handling, wake support and link
   synchronization.

* tag 'soundwire-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire: (31 commits)
  Soundwire: intel_init: save Slave(s) _ADR info in sdw_intel_ctx
  soundwire: intel: add wake interrupt support
  soundwire: intel/cadence: merge Soundwire interrupt handlers/threads
  soundwire: intel_init: use EXPORT_SYMBOL_NS
  soundwire: intel_init: add implementation of sdw_intel_enable_irq()
  soundwire: intel: introduce helper for link synchronization
  soundwire: intel: introduce a helper to arm link synchronization
  soundwire: intel: revisit SHIM programming sequences.
  soundwire: intel: reuse code for wait loops to set/clear bits
  soundwire: fix the kernel-doc comment
  soundwire: sdw.h: fix indentation
  soundwire: sdw.h: fix PRBS/Static_1 swapped definitions
  soundwire: intel: don't free dma_data in DAI shutdown
  soundwire: cadence: allocate/free dma_data in set_sdw_stream
  soundwire: intel: remove stream allocation/free
  soundwire: stream: add helper to startup/shutdown streams
  soundwire: intel: implement get_sdw_stream() operations
  MAINTAINERS: change SoundWire maintainer
  soundwire: bus: initialize bus clock base and scale registers
  soundwire: extend SDW_SLAVE_ENTRY
  ...

3 years agomisc: rtsx: Use standard PCI definitions
Bjorn Helgaas [Tue, 21 Jul 2020 21:23:36 +0000 (16:23 -0500)]
misc: rtsx: Use standard PCI definitions

When reading registers defined by the PCIe spec, use the names already
defined by the PCI core.  This makes maintenance of the PCI core and
drivers easier.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-6-helgaas@kernel.org
[ additional replacements due to changes in my tree - gregkh ]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: rtsx: Find L1 PM Substates capability instead of hard-coding
Bjorn Helgaas [Tue, 21 Jul 2020 21:23:35 +0000 (16:23 -0500)]
misc: rtsx: Find L1 PM Substates capability instead of hard-coding

Instead of hard-coding the location of the L1 PM Substates capability based
on the Device ID, search for it in the extended capabilities list.  This
works for any device, as long as it implements the L1 PM Substates
capability correctly, so it doesn't require maintenance as new devices are
added.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-5-helgaas@kernel.org
[ minor addition due to differences in my tree - gregkh]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: rtsx: Remove rtsx_pci_read/write_config() wrappers
Bjorn Helgaas [Tue, 21 Jul 2020 21:23:34 +0000 (16:23 -0500)]
misc: rtsx: Remove rtsx_pci_read/write_config() wrappers

rtsx_pci_read_config_dword() and similar wrappers around the PCI config
accessors add very little value, and they obscure the fact that often we
are accessing standard PCI registers that should be coordinated with the
PCI core.

Remove the wrappers and use the PCI config accessors directly.  No
functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-4-helgaas@kernel.org
[ fixed up some other instances as original patch was based on old tree - gregkh
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: rtsx: Remove unused pcie_cap
Bjorn Helgaas [Tue, 21 Jul 2020 21:23:33 +0000 (16:23 -0500)]
misc: rtsx: Remove unused pcie_cap

There are no more uses of struct rtsx_pcr.pcie_cap.  Remove it.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-3-helgaas@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agomisc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL
Bjorn Helgaas [Tue, 21 Jul 2020 21:23:32 +0000 (16:23 -0500)]
misc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL

Instead of using the driver-specific rtsx_pci_write_config_byte() to update
the PCIe Link Control Register, use pcie_capability_write_word() like the
rest of the kernel does.  This makes it easier to maintain ASPM across the
PCI core and drivers.

No functional change intended.  I missed this when doing 3d1e7aa80d1c
("misc: rtsx: Use pcie_capability_clear_and_set_word() for
PCI_EXP_LNKCTL").

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200721212336.1159079-2-helgaas@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agophy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails
Colin Ian King [Tue, 21 Jul 2020 15:06:13 +0000 (16:06 +0100)]
phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails

Currently when reading of the device property for "qcom,tx-deamp_3_5db"
fails the default is being assigned incorrectly to phy_dwc3->rx_eq. This
looks like a copy-n-paste error and in fact should be assigning the
default instead to phy_dwc3->tx_deamp_3_5db

Addresses-Coverity: ("Copy-paste error")
Fixes: ef19b117b834 ("phy: qualcomm: add qcom ipq806x dwc usb phy driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20200721150613.416876-1-colin.king@canonical.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: bcm63xx-usbh: Add BCM63xx USBH driver
Álvaro Fernández Rojas [Mon, 20 Jul 2020 13:12:09 +0000 (15:12 +0200)]
phy: bcm63xx-usbh: Add BCM63xx USBH driver

Add BCM63xx USBH PHY driver for BMIPS.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Simon Arlott <simon@octiron.net>
Link: https://lore.kernel.org/r/20200720131209.1236590-3-noltari@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: add bcm63xx-usbh bindings
Álvaro Fernández Rojas [Mon, 20 Jul 2020 13:12:08 +0000 (15:12 +0200)]
dt-bindings: phy: add bcm63xx-usbh bindings

Document BCM63xx USBH PHY bindings.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200720131209.1236590-2-noltari@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: armada-38x: fix NETA lockup when repeatedly switching speeds
Russell King [Tue, 21 Jul 2020 14:40:43 +0000 (15:40 +0100)]
phy: armada-38x: fix NETA lockup when repeatedly switching speeds

The mvneta hardware appears to lock up in various random ways when
repeatedly switching speeds between 1G and 2.5G, which involves
reprogramming the COMPHY.  It is not entirely clear why this happens,
but best guess is that reprogramming the COMPHY glitches mvneta clocks
causing the hardware to fail.  It seems that rebooting resolves the
failure, but not down/up cycling the interface alone.

Various other approaches have been tried, such as trying to cleanly
power down the COMPHY and then take it back through the power up
initialisation, but this does not seem to help.

It was finally noticed that u-boot's last step when configuring a
COMPHY for "SGMII" mode was to poke at a register described as
"GBE_CONFIGURATION_REG", which is undocumented in any external
documentation.  All that we have is the fact that u-boot sets a bit
corresponding to the "SGMII" lane at the end of COMPHY initialisation.

Experimentation shows that if we clear this bit prior to changing the
speed, and then set it afterwards, mvneta does not suffer this problem
on the SolidRun Clearfog when switching speeds between 1G and 2.5G.

This problem was found while script-testing phylink.

This fix also requires the corresponding change to DT to be effective.
See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching
speeds".

Fixes: 14dc100b4411 ("phy: armada38x: add common phy support")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt: update Marvell Armada 38x COMPHY binding
Russell King [Tue, 21 Jul 2020 14:40:33 +0000 (15:40 +0100)]
dt: update Marvell Armada 38x COMPHY binding

Update the Marvell Armada 38x COMPHY binding with an additional
optional register pair describing the location of an undocumented
system register controlling something to do with the Gigabit Ethernet
and COMPHY.  There is one bit for each COMPHY lane that may be using
the serdes, but exactly what this register does is completely unknown.

This register only appears to exist on Armada 38x devices, and not
other SoCs using the NETA ethernet block, so it seems logical that it
should be part of the COMPHY.

This is also how u-boot groups this register; it is dealt with as part
of the COMPHY initialisation there.

However, at the end of the day, due to the undocumented nature of this
register, we can only guess.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/E1jxtRZ-0003Ta-4h@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agocoresight: etm4x: Fix save/restore during cpu idle
Suzuki K Poulose [Thu, 16 Jul 2020 17:57:46 +0000 (11:57 -0600)]
coresight: etm4x: Fix save/restore during cpu idle

The ETM state save/restore incorrectly reads/writes some of the 64bit
registers (e.g, address comparators, vmid/cid comparators etc.) using
32bit accesses. Ensure we use the appropriate width accessors for
the registers.

Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-18-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: etm: perf: Add default sink selection to etm perf
Mike Leach [Thu, 16 Jul 2020 17:57:45 +0000 (11:57 -0600)]
coresight: etm: perf: Add default sink selection to etm perf

Add default sink selection to the perf trace handling in the etm driver.
Uses the select default sink infrastructure to select a sink for the perf
session, if no other sink is specified.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-17-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: tmc: Update sink types for default selection
Mike Leach [Thu, 16 Jul 2020 17:57:44 +0000 (11:57 -0600)]
coresight: tmc: Update sink types for default selection

An additional sink subtype is added to differentiate ETB/ETF buffer
sinks and ETR type system memory sinks.

This allows the prioritised selection of default sinks.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-16-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: Add default sink selection to CoreSight base
Mike Leach [Thu, 16 Jul 2020 17:57:43 +0000 (11:57 -0600)]
coresight: Add default sink selection to CoreSight base

Adds a method to select a suitable sink connected to a given source.

In cases where no sink is defined, the coresight_find_default_sink
routine can search from a given source, through the child connections
until a suitable sink is found.

The suitability is defined in by the sink coresight_dev_subtype on the
CoreSight device, and the distance from the source by counting
connections.

Higher value subtype is preferred - where these are equal, shorter
distance from source is used as a tie-break.

This allows for default sink to be discovered were none is specified
(e.g. perf command line)

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-15-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb()
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:42 +0000 (11:57 -0600)]
coresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb()

Reading TMC mode register without proper coresight power
management can lead to exceptions like the one in the call
trace below in tmc_read_unprepare_etb() when the trace data
is read after the sink is disabled. So fix this by having
a check for coresight sysfs mode before reading TMC mode
management register in tmc_read_unprepare_etb() similar to
tmc_read_prepare_etb().

  SError Interrupt on CPU6, code 0xbe000411 -- SError
  pstate: 80400089 (Nzcv daIf +PAN -UAO)
  pc : tmc_read_unprepare_etb+0x74/0x108
  lr : tmc_read_unprepare_etb+0x54/0x108
  sp : ffffff80d9507c30
  x29: ffffff80d9507c30 x28: ffffff80b3569a0c
  x27: 0000000000000000 x26: 00000000000a0001
  x25: ffffff80cbae9550 x24: 0000000000000010
  x23: ffffffd07296b0f0 x22: ffffffd0109ee028
  x21: 0000000000000000 x20: ffffff80d19e70e0
  x19: ffffff80d19e7080 x18: 0000000000000000
  x17: 0000000000000000 x16: 0000000000000000
  x15: 0000000000000000 x14: 0000000000000000
  x13: 0000000000000000 x12: 0000000000000000
  x11: 0000000000000000 x10: dfffffd000000001
  x9 : 0000000000000000 x8 : 0000000000000002
  x7 : ffffffd071d0fe78 x6 : 0000000000000000
  x5 : 0000000000000080 x4 : 0000000000000001
  x3 : ffffffd071d0fe98 x2 : 0000000000000000
  x1 : 0000000000000004 x0 : 0000000000000001
  Kernel panic - not syncing: Asynchronous SError Interrupt

Fixes: 4525412a5046 ("coresight: tmc: making prepare/unprepare functions generic")
Reported-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Tested-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-14-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: tmc: Add shutdown callback for TMC ETR
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:41 +0000 (11:57 -0600)]
coresight: tmc: Add shutdown callback for TMC ETR

Implement a shutdown callback to ensure ETR hardware is
properly shutdown in reboot/shutdown path. This is required
for ETR which has SMMU address translation enabled like on
SC7180 SoC and few others. If the hardware is still accessing
memory after SMMU translation is disabled as part of SMMU
shutdown callback in system reboot or shutdown path, then
IOVAs(I/O virtual address) which it was using will go on the
bus as the physical addresses which might result in unknown
crashes (NoC/interconnect errors). So we make sure from this
shutdown callback that the ETR is shutdown before SMMU translation
is disabled and device_link in SMMU driver will take care of
ordering of shutdown callbacks such that SMMU shutdown callback
is not called before any of its consumer shutdown callbacks.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-13-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: Fix comment in main header file
Mike Leach [Thu, 16 Jul 2020 17:57:40 +0000 (11:57 -0600)]
coresight: Fix comment in main header file

Comment for an elemnt in the coresight_device structure appears to have
been corrupted and makes no sense. Fix this before making further changes.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-12-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: etmv4: Counter values not saved on disable
Mike Leach [Thu, 16 Jul 2020 17:57:39 +0000 (11:57 -0600)]
coresight: etmv4: Counter values not saved on disable

The counter value registers change during operation, however this change
is not reflected in the values seen by the user in sysfs.

This fixes the issue by reading back the values on disable.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Fixes: 2e1cdfe184b52 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-11-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: etmv4: Fix resource selector constant
Mike Leach [Thu, 16 Jul 2020 17:57:38 +0000 (11:57 -0600)]
coresight: etmv4: Fix resource selector constant

ETMv4 max resource selector constant incorrectly set to 16. Updated to the
correct 32 value, and adjustments made to limited code using it.

Signed-off-by: Mike Leach <mike.leach@linaro.org>
Fixes: 2e1cdfe184b52 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-10-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: Drop double check for ACPI companion device
Andy Shevchenko [Thu, 16 Jul 2020 17:57:37 +0000 (11:57 -0600)]
coresight: Drop double check for ACPI companion device

acpi_dev_get_resources() does perform the NULL pointer check against
ACPI companion device which is given as function parameter. Thus,
there is no need to duplicate this check in the caller.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-9-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: Use devm_kcalloc() in coresight_alloc_conns()
Xu Wang [Thu, 16 Jul 2020 17:57:36 +0000 (11:57 -0600)]
coresight: Use devm_kcalloc() in coresight_alloc_conns()

A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "devm_kcalloc".

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-8-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agodt-bindings: arm: coresight: Add optional property to replicators
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:35 +0000 (11:57 -0600)]
dt-bindings: arm: coresight: Add optional property to replicators

Add an optional boolean property "qcom,replicator-loses-context" to
identify replicators which loses context when AMBA clocks are removed
in certain configurable replicator designs.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-7-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: replicator: Reset replicator if context is lost
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:34 +0000 (11:57 -0600)]
coresight: replicator: Reset replicator if context is lost

On some QCOM SoCs, replicators in Always-On domain loses its
context as soon as the clock is disabled. Currently as a part
of pm_runtime workqueue, clock is disabled after the replicator
is initialized by amba_pm_runtime_suspend assuming that context
is not lost which is not true for replicators with such
limitations. So add a new property "qcom,replicator-loses-context"
to identify such replicators and reset them.

Suggested-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-6-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agodt-bindings: arm: coresight: Add support to skip trace unit power up
Tingwei Zhang [Thu, 16 Jul 2020 17:57:33 +0000 (11:57 -0600)]
dt-bindings: arm: coresight: Add support to skip trace unit power up

Add "qcom,skip-power-up" property to identify systems which can
skip powering up of trace unit since they share the same power
domain as their CPU core. This is required to identify such
systems with hardware errata which stops the CPU watchdog counter
when the power up bit is set (TRCPDCR.PU).

Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-5-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: etm4x: Add support to skip trace unit power up
Tingwei Zhang [Thu, 16 Jul 2020 17:57:32 +0000 (11:57 -0600)]
coresight: etm4x: Add support to skip trace unit power up

On some Qualcomm Technologies Inc. SoCs like SC7180, there
exists a hardware errata where the APSS (Application Processor
SubSystem)/CPU watchdog counter is stopped when the trace unit
power up ETM register is set (TRCPDCR.PU = 1). Since the ETMs
share the same power domain as that of respective CPU cores,
they are powered on when the CPU core is powered on. So we can
skip powering up of trace unit after checking for this errata
via new property called "qcom,skip-power-up".

Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Co-developed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-4-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: catu: Use CS_AMBA_ID macro for id table
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:31 +0000 (11:57 -0600)]
coresight: catu: Use CS_AMBA_ID macro for id table

Use CS_AMBA_ID macro for coresight catu AMBA id table
instead of open coding.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-3-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agocoresight: replicator: Use CS_AMBA_ID macro for id table
Sai Prakash Ranjan [Thu, 16 Jul 2020 17:57:30 +0000 (11:57 -0600)]
coresight: replicator: Use CS_AMBA_ID macro for id table

Use CS_AMBA_ID macro for dynamic replicator AMBA id table
instead of open coding.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-2-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agophy: samsung-ufs: Fix IS_ERR argument
Gustavo A. R. Silva [Mon, 20 Jul 2020 13:27:18 +0000 (08:27 -0500)]
phy: samsung-ufs: Fix IS_ERR argument

Fix IS_ERR argument in samsung_ufs_phy_symbol_clk_init(). The proper
argument to be passed to IS_ERR() is phy->rx1_symbol_clk.

This bug was detected with the help of Coccinelle.

Fixes: bca21e930451 ("phy: samsung-ufs: add UFS PHY driver for samsung SoC")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20200720132718.GA13413@embeddedor
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agoSoundwire: intel_init: save Slave(s) _ADR info in sdw_intel_ctx
Bard Liao [Thu, 16 Jul 2020 15:09:47 +0000 (23:09 +0800)]
Soundwire: intel_init: save Slave(s) _ADR info in sdw_intel_ctx

Save ACPI information in context so that we can match machine driver
with sdw _ADR matching tables.

Suggested-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-10-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel: add wake interrupt support
Rander Wang [Thu, 16 Jul 2020 15:09:46 +0000 (23:09 +0800)]
soundwire: intel: add wake interrupt support

When system is suspended in clock stop mode on intel platforms, both
master and slave are in clock stop mode and soundwire bus is taken
over by a glue hardware. The bus message for jack event is processed
by this glue hardware, which will trigger an interrupt to resume audio
pci device. Then audio pci driver will resume soundwire master and slave,
transfer bus ownership to master, finally slave will report jack event
to master and codec driver is triggered to check jack status.

if a slave has been attached to a bus, the slave->dev_num_sticky
should be non-zero, so we can check this value to skip the
ghost devices defined in ACPI table but not populated in hardware.

Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-9-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel/cadence: merge Soundwire interrupt handlers/threads
Bard Liao [Thu, 16 Jul 2020 15:09:45 +0000 (23:09 +0800)]
soundwire: intel/cadence: merge Soundwire interrupt handlers/threads

The existing code uses one pair of interrupt handler/thread per link
but at the hardware level the interrupt is shared. This works fine for
legacy PCI interrupts, but leads to timeouts in MSI (Message-Signaled
Interrupt) mode, likely due to edges being lost.

This patch unifies interrupt handling for all links. The dedicated
handler is removed since we use a common one for all shared interrupt
sources, and the thread function takes care of dealing with interrupt
sources. This partition follows the model used for the SOF IPC on
HDaudio platforms, where similar timeout issues were noticed and doing
all the interrupt handling/clearing in the thread improved
reliability/stability.

Validation results with 4 links active in parallel show a night-and-day
improvement with no timeouts noticed even during stress tests. Latency
and quality of service are not affected by the change - mostly because
events on a SoundWire link are throttled by the bus frame rate
(typically 8..48kHz).

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-8-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel_init: use EXPORT_SYMBOL_NS
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:44 +0000 (23:09 +0800)]
soundwire: intel_init: use EXPORT_SYMBOL_NS

Make sure all symbols in this soundwire-intel-init module are exported
with a namespace.

The MODULE_IMPORT_NS will be used in Intel/SOF HDaudio modules to be
posted in a separate series.

Namespaces are only introduced for the Intel parts of the SoundWire
code at this time, in future patches we should also add namespaces for
Cadence parts and the SoundWire core.

Suggested-by: Greg KH <gregkh@linuxfoundation.org>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-7-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel_init: add implementation of sdw_intel_enable_irq()
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:43 +0000 (23:09 +0800)]
soundwire: intel_init: add implementation of sdw_intel_enable_irq()

This function is required to enable all interrupts across all links.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel: introduce helper for link synchronization
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:42 +0000 (23:09 +0800)]
soundwire: intel: introduce helper for link synchronization

After arming the synchronization, the SYNCGO field controls the
hardware-based synchronization between links.

Move the programming and wait for clear of SYNCGO to dedicated helper.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-5-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel: introduce a helper to arm link synchronization
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:41 +0000 (23:09 +0800)]
soundwire: intel: introduce a helper to arm link synchronization

Move code from pre_bank_switch to dedicated helper, will be used in
follow-up patches as recommended by programming flows.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-4-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel: revisit SHIM programming sequences.
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:40 +0000 (23:09 +0800)]
soundwire: intel: revisit SHIM programming sequences.

Somehow the existing code is not aligned with the steps described in
the documentation, refactor code and make sure the register
programming sequences are correct. Also add missing power-up,
power-down and wake capabilities (the last two are used in follow-up
patches but introduced here for consistency).

Some of the SHIM registers exposed fields that are link specific, and
in addition some of the power-related registers (SPA/CPA) take time to
be updated. Uncontrolled access leads to timeouts or errors. Add a
mutex, shared by all links, so that all accesses to such registers are
serialized, and follow a pattern of read-modify-write.

This includes making sure SHIM_SYNC is programmed only once, before
the first master is powered on. We use a 'shim_mask' field, shared
between all links and protected by a mutex, to deal with power-up and
power-down sequences.

Note that the SYNCPRD value is tied only to the XTAL value and not the
current bus frequency or the frame rate.

BugLink: https://github.com/thesofproject/linux/issues/1555
Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agosoundwire: intel: reuse code for wait loops to set/clear bits
Pierre-Louis Bossart [Thu, 16 Jul 2020 15:09:39 +0000 (23:09 +0800)]
soundwire: intel: reuse code for wait loops to set/clear bits

Refactor code and use same routines on set/clear

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200716150947.22119-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agoMerge v5.8-rc6 into char-misc-next
Greg Kroah-Hartman [Mon, 20 Jul 2020 07:43:40 +0000 (09:43 +0200)]
Merge v5.8-rc6 into char-misc-next

We need the char/misc fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
3 years agodt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support
Lad Prabhakar [Thu, 16 Jul 2020 17:18:24 +0000 (18:18 +0100)]
dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support

Document RZ/G2H (R8A774E1) SoC bindings.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support
Lad Prabhakar [Thu, 16 Jul 2020 17:18:20 +0000 (18:18 +0100)]
dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support

Document SoC specific bindings for RZ/G2H (r8a774e1) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594919915-5225-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: renesas: rcar-gen3-usb2: exit if request_irq() failed
Yoshihiro Shimoda [Fri, 17 Jul 2020 11:44:57 +0000 (20:44 +0900)]
phy: renesas: rcar-gen3-usb2: exit if request_irq() failed

To avoid unexpected behaviors, it's better to exit if request_irq()
failed.

Suggested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-3-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: renesas: rcar-gen3-usb2: move irq registration to init
Yoshihiro Shimoda [Fri, 17 Jul 2020 11:44:56 +0000 (20:44 +0900)]
phy: renesas: rcar-gen3-usb2: move irq registration to init

If CONFIG_DEBUG_SHIRQ was enabled, r8a77951-salvator-xs could boot
correctly. If we appended "earlycon keep_bootcon" to the kernel
command like, we could get kernel log like below.

    SError Interrupt on CPU0, code 0xbf000002 -- SError
    CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.8.0-rc3-salvator-x-00505-g6c843129e6faaf01 #785
    Hardware name: Renesas Salvator-X 2nd version board based on r8a77951 (DT)
    pstate: 60400085 (nZCv daIf +PAN -UAO BTYPE=--)
    pc : rcar_gen3_phy_usb2_irq+0x14/0x54
    lr : free_irq+0xf4/0x27c

This means free_irq() calls the interrupt handler while PM runtime
is not getting if DEBUG_SHIRQ is enabled and rcar_gen3_phy_usb2_probe()
failed. To fix the issue, move the irq registration place to
rcar_gen3_phy_usb2_init() which is ready to handle the interrupts.

Note that after the commit 549b6b55b005 ("phy: renesas: rcar-gen3-usb2:
enable/disable independent irqs") which is merged into v5.2, since this
driver creates multiple phy instances, needs to check whether one of
phy instances is initialized. However, if we backport this patch to v5.1
or less, we don't need to check it because such kernel have single
phy instance.

Reported-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 9f391c574efc ("phy: rcar-gen3-usb2: add runtime ID/VBUS pin detection")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594986297-12434-2-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agodevicetree: bindings: phy: Document ipq806x dwc3 qcom phy
Ansuel Smith [Fri, 17 Jul 2020 13:16:32 +0000 (15:16 +0200)]
devicetree: bindings: phy: Document ipq806x dwc3 qcom phy

Document dwc3 qcom phy hs and ss phy bindings needed to correctly
inizialize and use usb on ipq806x SoC.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200717131635.11076-2-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agophy: qualcomm: add qcom ipq806x dwc usb phy driver
Ansuel Smith [Fri, 17 Jul 2020 13:16:31 +0000 (15:16 +0200)]
phy: qualcomm: add qcom ipq806x dwc usb phy driver

This has lost in the original push for the dwc3 qcom driver.
This is needed for ipq806x SoC as without this the usb ports
doesn't work at all.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200717131635.11076-1-ansuelsmth@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
3 years agoLinux 5.8-rc6
Linus Torvalds [Sun, 19 Jul 2020 22:41:18 +0000 (15:41 -0700)]
Linux 5.8-rc6

3 years agoMerge tag 'perf-tools-fixes-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 19 Jul 2020 19:35:07 +0000 (12:35 -0700)]
Merge tag 'perf-tools-fixes-2020-07-19' of git://git./linux/kernel/git/acme/linux into master

Pull perf tooling fixes from Arnaldo Carvalho de Melo:

 - Update hashmap.h from libbpf and kvm.h from x86's kernel UAPI.

 - Set opt->set in libsubcmd's OPT_CALLBACK_SET(). This fixes
   'perf record --switch-output-event event-name' usage"

* tag 'perf-tools-fixes-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  tools arch kvm: Sync kvm headers with the kernel sources
  perf tools: Sync hashmap.h with libbpf's
  libsubcmd: Fix OPT_CALLBACK_SET()

3 years agoMerge tag 'x86-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 19 Jul 2020 19:16:09 +0000 (12:16 -0700)]
Merge tag 'x86-urgent-2020-07-19' of git://git./linux/kernel/git/tip/tip into master

Pull x86 fixes from Thomas Gleixner:
 "A pile of fixes for x86:

   - Fix the I/O bitmap invalidation on XEN PV, which was overlooked in
     the recent ioperm/iopl rework. This caused the TSS and XEN's I/O
     bitmap to get out of sync.

   - Use the proper vectors for HYPERV.

   - Make disabling of stack protector for the entry code work with GCC
     builds which enable stack protector by default. Removing the option
     is not sufficient, it needs an explicit -fno-stack-protector to
     shut it off.

   - Mark check_user_regs() noinstr as it is called from noinstr code.
     The missing annotation causes it to be placed in the text section
     which makes it instrumentable.

   - Add the missing interrupt disable in exc_alignment_check()

   - Fixup a XEN_PV build dependency in the 32bit entry code

   - A few fixes to make the Clang integrated assembler happy

   - Move EFI stub build to the right place for out of tree builds

   - Make prepare_exit_to_usermode() static. It's not longer called from
     ASM code"

* tag 'x86-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/boot: Don't add the EFI stub to targets
  x86/entry: Actually disable stack protector
  x86/ioperm: Fix io bitmap invalidation on Xen PV
  x86: math-emu: Fix up 'cmp' insn for clang ias
  x86/entry: Fix vectors to IDTENTRY_SYSVEC for CONFIG_HYPERV
  x86/entry: Add compatibility with IAS
  x86/entry/common: Make prepare_exit_to_usermode() static
  x86/entry: Mark check_user_regs() noinstr
  x86/traps: Disable interrupts in exc_aligment_check()
  x86/entry/32: Fix XEN_PV build dependency

3 years agoMerge tag 'timers-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 19 Jul 2020 19:06:08 +0000 (12:06 -0700)]
Merge tag 'timers-urgent-2020-07-19' of git://git./linux/kernel/git/tip/tip into master

Pull timer fixes from Thomas Gleixner:
 "Two fixes for the timer wheel:

   - A timer which is already expired at enqueue time can set the
     base->next_expiry value backwards. As a consequence base->clk can
     be set back as well. This can lead to timers expiring early. Add a
     sanity check to prevent this.

   - When a timer is queued with an expiry time beyond the wheel
     capacity then it should be queued in the bucket of the last wheel
     level which is expiring last.

     The code adjusted the expiry time to the maximum wheel capacity,
     which is only correct when the wheel clock is 0. Aside of that the
     check whether the delta is larger than wheel capacity does not
     check the delta, it checks the expiry value itself. As a result
     timers can expire at random.

     Fix this by checking the right variable and adjust expiry time so
     it becomes base->clock plus capacity which places it into the
     outmost bucket in the last wheel level"

* tag 'timers-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  timer: Fix wheel index calculation on last level
  timer: Prevent base->clk from moving backward

3 years agoMerge tag 'sched-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 19 Jul 2020 18:55:24 +0000 (11:55 -0700)]
Merge tag 'sched-urgent-2020-07-19' of git://git./linux/kernel/git/tip/tip into master

Pull scheduler fixes from Thomas Gleixner:
 "A set of scheduler fixes:

   - Plug a load average accounting race which was introduced with a
     recent optimization casing load average to show bogus numbers.

   - Fix the rseq CPU id initialization for new tasks. sched_fork() does
     not update the rseq CPU id so the id is the stale id of the parent
     task, which can cause user space data corruption.

   - Handle a 0 return value of task_h_load() correctly in the load
     balancer, which does not decrease imbalance and therefore pulls
     until the maximum number of loops is reached, which might be all
     tasks just created by a fork bomb"

* tag 'sched-urgent-2020-07-19' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/fair: handle case of task_h_load() returning 0
  sched: Fix unreliable rseq cpu_id for new tasks
  sched: Fix loadavg accounting race