dt: update Marvell Armada 38x COMPHY binding
authorRussell King <rmk+kernel@armlinux.org.uk>
Tue, 21 Jul 2020 14:40:33 +0000 (15:40 +0100)
committerVinod Koul <vkoul@kernel.org>
Tue, 21 Jul 2020 17:27:46 +0000 (22:57 +0530)
commit6c89533deeb36a8f2a7571e13d338edd2c76d473
tree34b89e2b179eb31135f3d2c32b7f43436301d5ae
parente9f84ec63c6f0f2fecd3c5bdec0178bb927c0c77
dt: update Marvell Armada 38x COMPHY binding

Update the Marvell Armada 38x COMPHY binding with an additional
optional register pair describing the location of an undocumented
system register controlling something to do with the Gigabit Ethernet
and COMPHY.  There is one bit for each COMPHY lane that may be using
the serdes, but exactly what this register does is completely unknown.

This register only appears to exist on Armada 38x devices, and not
other SoCs using the NETA ethernet block, so it seems logical that it
should be part of the COMPHY.

This is also how u-boot groups this register; it is dealt with as part
of the COMPHY initialisation there.

However, at the end of the day, due to the undocumented nature of this
register, we can only guess.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/E1jxtRZ-0003Ta-4h@rmk-PC.armlinux.org.uk
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/phy/phy-armada38x-comphy.txt