linux-2.6-microblaze.git
3 years agoMerge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f...
Daniel Vetter [Fri, 26 Mar 2021 14:52:01 +0000 (15:52 +0100)]
Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-5.13-2021-03-23:

amdgpu:
- Debugfs cleanup
- Various cleanups and spelling fixes
- Flexible array cleanups
- Initial AMD Freesync HDMI
- Display fixes
- 10bpc dithering improvements
- Display ASSR support
- Clean up and unify powerplay and swsmu interfaces
- Vangogh fixes
- Add SMU gfx busy queues for RV/PCO
- PCIE DPM fixes
- S0ix fixes
- GPU metrics data fixes
- DCN secure display support
- Backlight type override
- Add initial support for Aldebaran
- RAS fixes
- Prime fixes for A+A systems
- Reset fixes
- Initial resource cursor support
- Drop legacy IO BAR requirements
- Various power fixes

amdkfd:
- MMU notifier fixes
- APU fixes

radeon:
- Debugfs cleanups
- Flexible array cleanups

UAPI:
- amdgpu: Add a new INFO ioctl interface to query video capabilities
  rather than hardcoding them in userspace.  This allows us to provide
  fine grained asic capabilities (e.g., if a particular part is
  bandwidth limited, we can limit the capabilities).  Proposed userspace:
  https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps
  https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps
- amdkfd: bump the driver version.  There was a problem with reporting
  some RAS features on older versions of the driver. Proposed userspace:
  https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21

Danvet: A bunch of conflicts all over, but it seems to compile ... I
did put the call to dc_allow_idle_optimizations() on a single line
since it looked a bit too jarring to be left alone.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com
3 years agodrm/amdkfd: Bump KFD API version
Felix Kuehling [Tue, 9 Mar 2021 20:03:28 +0000 (15:03 -0500)]
drm/amdkfd: Bump KFD API version

Indicate the availability reliable SRAM EDC state in the new bit
in the device properties.

Proposed userspace changes:
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Mark Aldebaran HW support as experimental
Felix Kuehling [Thu, 18 Mar 2021 16:02:48 +0000 (12:02 -0400)]
drm/amdgpu: Mark Aldebaran HW support as experimental

The HW is not in production yet. Driver support is still in development.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: revert "reserve backup pages for bad page retirment"
Christian König [Thu, 18 Mar 2021 13:04:06 +0000 (14:04 +0100)]
drm/amdgpu: revert "reserve backup pages for bad page retirment"

As noted during the review this approach doesn't make sense at all.

We should not apply any limitation on the VRAM applications can use inside the kernel.

If an application or end user wants to reserve a certain amount of VRAM for bad pages handling we should do this in the upper layer.

This reverts commit f89b881c81d9a6481fc17b46b351ca38f5dd6f3a.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: revert "use the new cursor in the VM code"
Christian König [Wed, 17 Mar 2021 13:42:30 +0000 (14:42 +0100)]
drm/amdgpu: revert "use the new cursor in the VM code"

We are seeing VM page faults with this. Revert the change until the bugs
are fixed.

This reverts commit 94ae8dc55790de8979b58428672c8e0b97ee0dae.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps
Alex Deucher [Fri, 19 Mar 2021 02:15:06 +0000 (22:15 -0400)]
drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps

Move the function protoype to the right header and guard
the call with CONFIG_DRM_AMD_DC_DCN as DSC is only available
with DCN.

Fixes: 8c2f14c36f47ce ("drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Dillon Varone <dillon.varone@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
3 years agodrm/amd/display: Remove unnecessary conversion to bool
Jiapeng Chong [Thu, 18 Mar 2021 02:36:52 +0000 (10:36 +0800)]
drm/amd/display: Remove unnecessary conversion to bool

Fix the following coccicheck warnings:

./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c:220:65-70:
WARNING: conversion to bool not needed here.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Remove unnecessary conversion to bool
Jiapeng Chong [Tue, 16 Mar 2021 08:08:49 +0000 (16:08 +0800)]
drm/amd/display: Remove unnecessary conversion to bool

Fix the following coccicheck warnings:

./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c:721:65-70: WARNING:
conversion to bool not needed here.

./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c:1139:67-72: WARNING:
conversion to bool not needed here.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Fix memory leak
xinhui pan [Wed, 17 Mar 2021 09:33:02 +0000 (17:33 +0800)]
drm/amdgpu: Fix memory leak

drm_gem_object_put() should be paired with drm_gem_object_lookup().

All gem objs are saved in fb->base.obj[]. Need put the old first before
assign a new obj.

Trigger VRAM leak by running command below
$ service gdm restart

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agoradeon: use kvcalloc for relocs and chunks
Chen Li [Wed, 17 Mar 2021 14:48:29 +0000 (22:48 +0800)]
radeon: use kvcalloc for relocs and chunks

kvmalloc_array + __GFP_ZERO is the same with kvcalloc.

As for p->chunks, it will be used in:
```
if (ib_chunk->kdata)
memcpy(parser->ib.ptr, ib_chunk->kdata, ib_chunk->length_dw * 4);
```

If chunks doesn't zero out with __GFP_ZERO, it may point to somewhere else, e.g.,
```
Unable to handle kernel paging request at virtual address 0000000000010000
...
pc is at memcpy+0x84/0x250
ra is at radeon_cs_ioctl+0x368/0xb90 [radeon]
```

after allocating chunks with __GFP_KERNEL/kvcalloc, this bug is fixed.
Fixes: 3fcb4f01deed ("drm/radeon: Use kvmalloc for CS chunks")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Chen Li <chenli@uniontech.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: drop extraneous hw_status update
Alex Deucher [Mon, 15 Mar 2021 21:05:23 +0000 (17:05 -0400)]
drm/amdgpu: drop extraneous hw_status update

We set the same variable a few lines above.  Drop the duplicate
setting.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Support vertical interrupt 0 for all dcn ASIC
Wayne Lin [Wed, 10 Mar 2021 15:40:01 +0000 (23:40 +0800)]
drm/amd/display: Support vertical interrupt 0 for all dcn ASIC

[Why]
When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will try
to register vertical interrupt 0 for specific task.

Currently, only dcn10 have defined relevant info for vertical interrupt
0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, will
get DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() and
cause pointer errors.

[How]
Add support of vertical interrupt 0 for all dcn ASIC.

v2: squash in build fix (Alex)

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix vertical interrupt 0 registering issue
Wayne Lin [Wed, 10 Mar 2021 05:53:24 +0000 (13:53 +0800)]
drm/amd/display: Fix vertical interrupt 0 registering issue

[Why]
Find out that when we are registering vertical interrupt0, we get
DC_IRQ_SOURCE_INVALID when call dc_interrupt_to_irq_source for
DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL.

After analyzing, it's due to the defined value for
DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL is not
(DCN_1_0__SRCID__OTG5_VERTICAL_INTERRUPT0_CONTROL + 1). It's not
incremental sequence.

[How]
Use an array to record all vertical interrupt0 SRCID. While registering
interrupt, use an incremental index to visit the array to get the right
SRCID to register.

Also add error handling to avoid potential pointer problem.

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: correct the gpu metrics version
Evan Quan [Wed, 10 Mar 2021 07:31:43 +0000 (15:31 +0800)]
drm/amd/pm: correct the gpu metrics version

For V1_0 and V1_1, they come with different size. Misuse may cause
out of memory access.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/display: re-enable freesync video patches
Nikola Cornij [Mon, 15 Mar 2021 23:51:37 +0000 (19:51 -0400)]
drm/amdgpu/display: re-enable freesync video patches

Since this is a "revert of a revert", the end effect is that freesync
video is back to its original state, the way it was before the first
revert.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: Use BACO reset arg 0 on XGMI configuration
shaoyunl [Mon, 15 Mar 2021 15:39:28 +0000 (11:39 -0400)]
drm/amd/pm: Use BACO reset arg 0 on XGMI configuration

With arg 1 BACO reset, it will try to reload the SMU FW after reset.
This might failed if driver already in a pending reset status during probe period.
Arg 0 reset will bring  asic back to a clean state and driver will re-init
everythign including SMU FW

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Keep pending_reset valid during smu reset the ASIC
shaoyunl [Mon, 15 Mar 2021 15:36:14 +0000 (11:36 -0400)]
drm/amdgpu: Keep pending_reset valid during smu reset the ASIC

SMU internal might need to check this pending_reset setting to decide the reset method

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Enable light SBR in XGMI+passthrough configuration
shaoyunl [Thu, 11 Mar 2021 16:18:08 +0000 (11:18 -0500)]
drm/amdgpu: Enable light SBR in XGMI+passthrough configuration

This is to fix the case where it only enable the light SMU
on normal device init. This feature actually need to be enabled after ASIC
been reset as well.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix potential memory leak
Qingqing Zhuo [Tue, 9 Mar 2021 20:10:24 +0000 (15:10 -0500)]
drm/amd/display: Fix potential memory leak

[Why]
vblank_workqueue is never released.

[How]
Free it upon dm finish.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: add a func to disable accelerated mode
Yao Wang1 [Tue, 9 Mar 2021 09:51:58 +0000 (17:51 +0800)]
drm/amd/display: add a func to disable accelerated mode

[Why]
When driver disabled, we driver force the YCbCr420 to RGB,
which means some register will be changed, such as
RDPCS_PHY_DP_MPLLB_TX_CLK_DIV changed from 1 to 0
When driver re-enabled, OS will Set Mode YCbCr420 again,
which means the register RDPCS_PHY_DP_MPLLB_TX_CLK_DIV
should to be 1 again, but dmub fw can’t update the
register to 1 due to the mpll is not off

[How]
Adds an interface to disable accelerated mode bit,
which allows DM to decide to call during driver
disable/unload scenarios.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Yao Wang1 <Yao.Wang1@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: fix dcn3+ bw validation soc param update sequence
Dmytro Laktyushkin [Wed, 17 Feb 2021 16:32:10 +0000 (11:32 -0500)]
drm/amd/display: fix dcn3+ bw validation soc param update sequence

SOC needs to be updated to the WM set A values before validation
happens.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: fix dml prefetch validation
Dmytro Laktyushkin [Thu, 4 Mar 2021 16:04:26 +0000 (11:04 -0500)]
drm/amd/display: fix dml prefetch validation

Incorrect variable used, missing initialization during validation.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: 3.2.127
Aric Cyr [Mon, 8 Mar 2021 18:10:50 +0000 (13:10 -0500)]
drm/amd/display: 3.2.127

This DC patchset brings improvements in multiple areas. In summary, we
highlight:

* Add debug out when viewport too small
* use max lb for latency hiding
* System black screen hangs on driver load
* Fix UBSAN warning for not a valid value for type '_Bool'
* Fix for outbox1 ring buffer typecasting issue
* Bypass sink detect when there are no eDPs connected
* Increase precision for bpp in DSC calculations
* Add changes for dsc bpp in 16ths and unify bw calculations
* Correct algorithm for reversed gamma
* Remove MPC gamut remap logic for DCN30
* Fix typo for helpers function name
* Fix secure display lock problems
* Fix no previous prototype warning
* Separate caps for maximum RGB and YUV plane counts
* Add debugfs to control DMUB trace buffer events
* [FW Promotion] Release 0.0.56
* DCHUB underflow counter increasing in some scenarios
* fix dml prefetch validation
* fix dcn3+ bw validation soc param update sequence
* add a func to disable accelerated mode
* Fix potential memory leak

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: DCHUB underflow counter increasing in some scenarios
Aric Cyr [Mon, 8 Mar 2021 20:43:34 +0000 (15:43 -0500)]
drm/amd/display: DCHUB underflow counter increasing in some scenarios

[Why]
When unplugging a display, the underflow counter can be seen to
increase because PSTATE switch is allowed even when some planes are not
blanked.

[How]
Check that all planes are not active instead of all streams before
allowing PSTATE change.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: [FW Promotion] Release 0.0.56
Anthony Koo [Mon, 8 Mar 2021 16:52:42 +0000 (11:52 -0500)]
drm/amd/display: [FW Promotion] Release 0.0.56

More updates to the comments to better describe the function of
different cmds and parameters in the dmub interface.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Add debugfs to control DMUB trace buffer events
Leo (Hanghong) Ma [Tue, 23 Feb 2021 18:10:19 +0000 (13:10 -0500)]
drm/amd/display: Add debugfs to control DMUB trace buffer events

[Why]
We want to have a debugfs interface to enable or disable DMCUB
trace buffer events.

[How]
Add debugfs interface to enable or disable trace buffer events.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Separate caps for maximum RGB and YUV plane counts
Atufa Khan [Thu, 25 Feb 2021 21:18:35 +0000 (16:18 -0500)]
drm/amd/display: Separate caps for maximum RGB and YUV plane counts

Not all ASICs have same plane capabilities so need to split them
out for proper support handling.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Atufa Khan <Atufa.Khan@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix no previous prototype warning
Wayne Lin [Mon, 8 Mar 2021 02:01:31 +0000 (10:01 +0800)]
drm/amd/display: Fix no previous prototype warning

[Why]
Received compiling warning:

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5574:5:
warning: no previous prototype for 'amdgpu_dm_crtc_late_register'
[-Wmissing-prototypes]
    5574 | int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In
function 'dm_update_mst_vcpi_slots_for_dsc':
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6405:46:
warning: variable 'old_con_state' set but not used
[-Wunused-but-set-variable]
    6405 |  struct drm_connector_state *new_con_state, *old_con_state;
         |                                              ^~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In
function 'amdgpu_dm_commit_cursors':
   drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8006:44:
warning: variable 'new_plane_state' set but not used
[-Wunused-but-set-variable]
    8006 |  struct drm_plane_state *old_plane_state, *new_plane_state;
         |                                            ^~~~~~~~~~~~~~~

vim +/amdgpu_dm_crtc_late_register +5574
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c

  5572
  5573  #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
> 5574  int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc)
  5575  {
  5576          crtc_debugfs_init(crtc);
  5577
  5578          return 0;
  5579  }
  5580  #endif
  5581

[How]
Fix it with declaration as "static"

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix secure display lock problems
Wayne Lin [Sat, 6 Mar 2021 10:37:33 +0000 (18:37 +0800)]
drm/amd/display: Fix secure display lock problems

[Why]
Find out few locks problems while doing secure display. They are
following few parts:

1. crc_rd_work_lock in amdgpu_dm_crtc_handle_crc_window_irq() should
also use spin_lock_irqsave instead of spin_lock_irq.

2. In crc_win_update_set(), crc_rd_work_lock should be grabbed after
obtaining lock event_lock. Otherwise, will cause deadlock by conflicting
the lock order in amdgpu_dm_crtc_handle_crc_window_irq()

3. flush_work() in crc_win_update_set() is no need and will cause
deadlock since amdgpu_dm_crtc_notify_ta_to_read() also tries to grab
lock crc_rd_work_lock.

[How]
Fix above problems.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Reviewed-by: Solomon Chiu <Solomon.Chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix typo for helpers function name
Leo (Hanghong) Ma [Wed, 3 Mar 2021 19:12:52 +0000 (14:12 -0500)]
drm/amd/display: Fix typo for helpers function name

[why]
Word "helper" was misspelled as "helpes" in
dm_helpes_dmub_outbox0_interrupt_control function.

[how]
Fix the spelling.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Remove MPC gamut remap logic for DCN30
Dillon Varone [Thu, 4 Mar 2021 22:39:10 +0000 (17:39 -0500)]
drm/amd/display: Remove MPC gamut remap logic for DCN30

[Why?]
Should only reroute gamut remap to mpc unless 3D LUT is not used and all
planes are using the same src->dest.

[How?]
Remove DCN30 specific logic for rerouting gamut remap to mpc.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Correct algorithm for reversed gamma
Calvin Hou [Tue, 2 Mar 2021 15:48:26 +0000 (10:48 -0500)]
drm/amd/display: Correct algorithm for reversed gamma

[Why]
DCN30 needs to correctly program reversed gamma curve, which DCN20
already has.
Also needs to fix a bug that 252-255 values are clipped.

[How]
Apply two fixes into DCN30.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Calvin Hou <Calvin.Hou@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Acked-by: Vladimir Stempen <Vladimir.Stempen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations
Dillon Varone [Thu, 4 Mar 2021 01:50:57 +0000 (20:50 -0500)]
drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations

[Why?]
Some code still expected bpp to be used in whole bits, not 16ths.  dsc.c uses
redundant function now found in dc to calculate stream bandwidth from timing.

[How?]
Fix code to work with 16ths instead of whole bits for dsc bpp.
Refactor get_dsc_bandwidth to accept inputs in 16ths of a bit.
Use dc function to calculate bandwidth from timing, and make dsc bw calculation
a part of dsc.c.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Increase precision for bpp in DSC calculations
Jun Lei [Wed, 16 Dec 2020 17:56:38 +0000 (12:56 -0500)]
drm/amd/display: Increase precision for bpp in DSC calculations

[Why?]
Many DSC variables and related functions use whole bits for bpp.

[How?]
Change variables and related functions to use 16ths of a bit for bpp.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Bypass sink detect when there are no eDPs connected
Jake Wang [Tue, 2 Mar 2021 22:55:36 +0000 (17:55 -0500)]
drm/amd/display: Bypass sink detect when there are no eDPs connected

[How & Why]
Check DC config to determine if there are any eDPs connected. If there
are no eDPs connected, bypass sink detect when querying eDP presence.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix for outbox1 ring buffer typecasting issue
Meenakshikumar Somasundaram [Wed, 3 Mar 2021 23:31:03 +0000 (18:31 -0500)]
drm/amd/display: Fix for outbox1 ring buffer typecasting issue

[WHY]
Compiler warning "pointer to integer of different size" reported on
outbox1 ring buffer address typecasting.

Reported-by: kernel test robot <lkp@intel.com>
[HOW]
Fixed the issue by typecasting with character pointer.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Fix UBSAN warning for not a valid value for type '_Bool'
Anson Jacob [Tue, 2 Mar 2021 21:16:36 +0000 (16:16 -0500)]
drm/amd/display: Fix UBSAN warning for not a valid value for type '_Bool'

[Why]
dc_cursor_position do not initialise position.translate_by_source when
crtc or plane->state->fb is NULL. UBSAN caught this error in
dce110_set_cursor_position, as the value was garbage.

[How]
Initialise dc_cursor_position structure elements to 0 in handle_cursor_update
before calling get_cursor_position.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1471
Reported-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Anson Jacob <Anson.Jacob@amd.com>
Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: System black screen hangs on driver load
Aric Cyr [Tue, 2 Mar 2021 21:33:12 +0000 (16:33 -0500)]
drm/amd/display: System black screen hangs on driver load

This reverts commit dbc43d5fdf48e4e558338fcaef8c9d19521d1c2e
as it causes crash on driver load in some scenarios.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: use max lb for latency hiding
Dmytro Laktyushkin [Mon, 7 Dec 2020 21:23:41 +0000 (16:23 -0500)]
drm/amd/display: use max lb for latency hiding

Enable max memory lb config to improve stutter efficiency and
latency hiding. Also increase max number of lb lines to be
used by dml since experiments have shown that there isnt a hard max
beyond what fits in lb.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Add debug out when viewport too small
Nikola Cornij [Sat, 27 Feb 2021 01:28:49 +0000 (20:28 -0500)]
drm/amd/display: Add debug out when viewport too small

[why] It helps debugging display setup issues

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: 3.2.126.1
Aric Cyr [Mon, 1 Mar 2021 17:03:52 +0000 (12:03 -0500)]
drm/amd/display: 3.2.126.1

Bumping DC version for DMU FW fix

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: fix workload mismatch on vega10
Kenneth Feng [Tue, 16 Mar 2021 02:28:00 +0000 (10:28 +0800)]
drm/amd/pm: fix workload mismatch on vega10

Workload number mapped to the correct one.
This issue is only on vega10.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Use dev_info if VFCT table not valid
Feifei Xu [Fri, 12 Mar 2021 08:27:47 +0000 (16:27 +0800)]
drm/amdgpu: Use dev_info if VFCT table not valid

Some ASICs do not have GOP driver to copy vbios image into
VFCT table. And it will go to next check.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: drop legacy IO bar support
Alex Deucher [Mon, 15 Mar 2021 15:14:40 +0000 (11:14 -0400)]
drm/amdgpu: drop legacy IO bar support

It was leftover from radeon where it was required for some
specific old hardware.  It hasn't been required for ages
and the driver already falls back to MMIO when legacy IO
is not available.  Legacy IO also seems to be problematic on
on some thunderbolt devices.  Drop it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>
3 years agodrm/amd/display: Remove unnecessary conversion to bool
Jiapeng Chong [Mon, 15 Mar 2021 08:22:02 +0000 (16:22 +0800)]
drm/amd/display: Remove unnecessary conversion to bool

Fix the following coccicheck warnings:

./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c:358:69-74: WARNING:
conversion to bool not needed here.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: Mundane typo fixes in the file amdgpu_pm.c
Bhaskar Chowdhury [Mon, 15 Mar 2021 03:21:36 +0000 (08:51 +0530)]
drm/amd/pm: Mundane typo fixes in the file amdgpu_pm.c

s/"an minimum"/"a minimum"/
s/"an maxmum"/"a maximum"/

Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: remove redundant initialization of variable result
Colin Ian King [Thu, 11 Mar 2021 16:34:17 +0000 (16:34 +0000)]
drm/amd/display: remove redundant initialization of variable result

The variable result is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: Fix spelling mistake "disble" -> "disable"
Colin Ian King [Fri, 12 Mar 2021 10:08:42 +0000 (10:08 +0000)]
drm/amd/pm: Fix spelling mistake "disble" -> "disable"

There is a spelling mistake in an assert message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: add a new sysfs entry for default power limit
Eric Huang [Fri, 12 Mar 2021 17:43:32 +0000 (12:43 -0500)]
drm/amd/pm: add a new sysfs entry for default power limit

Driver doesn't keep the default bootup power limit and expose it
to user. As requested we add it in driver.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Free local data after use
Victor Lu [Thu, 11 Mar 2021 18:00:20 +0000 (13:00 -0500)]
drm/amd/display: Free local data after use

Fixes the following memory leak in dc_link_construct():

unreferenced object 0xffffa03e81471400 (size 1024):
comm "amd_module_load", pid 2486, jiffies 4294946026 (age 10.544s)
hex dump (first 32 bytes):
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
backtrace:
[<000000000bdf5c4a>] kmem_cache_alloc_trace+0x30a/0x4a0
[<00000000e7c59f0e>] link_create+0xce/0xac0 [amdgpu]
[<000000002fb6c072>] dc_create+0x370/0x720 [amdgpu]
[<000000000094d1f3>] amdgpu_dm_init+0x18e/0x17a0 [amdgpu]
[<00000000bec048fd>] dm_hw_init+0x12/0x20 [amdgpu]
[<00000000a2bb7cf6>] amdgpu_device_init+0x1463/0x1e60 [amdgpu]
[<0000000032d3bb13>] amdgpu_driver_load_kms+0x5b/0x330 [amdgpu]
[<00000000a27834f9>] amdgpu_pci_probe+0x192/0x280 [amdgpu]
[<00000000fec7d291>] local_pci_probe+0x47/0xa0
[<0000000055dbbfa7>] pci_device_probe+0xe3/0x180
[<00000000815da970>] really_probe+0x1c4/0x4e0
[<00000000b4b6974b>] driver_probe_device+0x62/0x150
[<000000000f9ecc61>] device_driver_attach+0x58/0x60
[<000000000f65c843>] __driver_attach+0xd6/0x150
[<000000002f5e3683>] bus_for_each_dev+0x6a/0xc0
[<00000000a1cfc897>] driver_attach+0x1e/0x20

Fixes: 3a00c04212d1cf ("drm/amd/display/dc/core/dc_link: Move some local data from the stack to the heap")
Signed-off-by: Victor Lu <victorchengchi.lu@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: nuke the ih reentrant lock
Christian König [Fri, 12 Mar 2021 13:00:33 +0000 (14:00 +0100)]
drm/amdgpu: nuke the ih reentrant lock

Interrupts on are non-reentrant on linux. This is just an ancient
leftover from radeon where irq processing was kicked of from different
places.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Fix recursive lock warnings
Felix Kuehling [Thu, 11 Mar 2021 02:42:01 +0000 (21:42 -0500)]
drm/amdkfd: Fix recursive lock warnings

memalloc_nofs_save/restore are no longer sufficient to prevent recursive
lock warnings when holding locks that can be taken in MMU notifiers. Use
memalloc_noreclaim_save/restore instead.

Fixes: f920e413ff9c ("mm: track mmu notifiers in fs_reclaim_acquire/release")
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix send ras disable cmd when asic not support ras
Stanley.Yang [Wed, 10 Mar 2021 11:10:11 +0000 (19:10 +0800)]
drm/amdgpu: fix send ras disable cmd when asic not support ras

    cause:
It is necessary to send ras disable command to ras-ta during gfx
block ras later init, because the ras capability is disable read
from vbios for vega20 gaming, but the ras context is released
during ras init process, this will cause send ras disable command
to ras-to failed.
    how:
Delay releasing ras context, the ras context
will be released after gfx block later init done.

Changed from V1:
    move release_ras_context into ras_resume

Changed from V2:
    check BIT(UMC) is more reasonable before access eeprom table

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now
charles sun [Sun, 14 Mar 2021 11:19:10 +0000 (19:19 +0800)]
drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now

[why]
 the dcn301_calculate_wm_and_dl() calculation exposed a issue
 - switch to dcn30 version for now.
 still need to follow up with dcn301 watermark updates version.

v2: squash in warning fix

Signed-off-by: Charles Sun <charles.sun@amd.com>
Reviewed-by: Nikola Cornij <nikola.cornij@amd.com>
Acked-by: Charles Sun <charles.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: update ecc query support for arcturus
Hawking Zhang [Fri, 12 Mar 2021 14:25:07 +0000 (22:25 +0800)]
drm/amdgpu: update ecc query support for arcturus

arcturus and sienna_cichlid share the same version
of umc_info interface (umc_info v33). arcturus uses
umc_config to indicate ECC capability, while
sienna_cichlid uses umc_config1 to indicate ECC
capability. driver needs to check either umc_config
or umc_config1 to decide ECC capability for ASICs
that use umc_info v33 interface.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use the new cursor in the VM code
Christian König [Wed, 17 Feb 2021 18:31:39 +0000 (19:31 +0100)]
drm/amdgpu: use the new cursor in the VM code

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use the new cursor in amdgpu_ttm_bo_eviction_valuable
Christian König [Wed, 17 Feb 2021 18:43:34 +0000 (19:43 +0100)]
drm/amdgpu: use the new cursor in amdgpu_ttm_bo_eviction_valuable

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use new cursor in amdgpu_mem_visible
Christian König [Wed, 17 Feb 2021 13:48:07 +0000 (14:48 +0100)]
drm/amdgpu: use new cursor in amdgpu_mem_visible

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use the new cursor in amdgpu_ttm_access_memory
Christian König [Wed, 17 Feb 2021 13:33:54 +0000 (14:33 +0100)]
drm/amdgpu: use the new cursor in amdgpu_ttm_access_memory

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use new cursor in amdgpu_ttm_io_mem_pfn
Christian König [Wed, 17 Feb 2021 12:50:49 +0000 (13:50 +0100)]
drm/amdgpu: use new cursor in amdgpu_ttm_io_mem_pfn

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use the new cursor in amdgpu_fill_buffer
Christian König [Wed, 17 Feb 2021 12:20:27 +0000 (13:20 +0100)]
drm/amdgpu: use the new cursor in amdgpu_fill_buffer

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use the new cursor in amdgpu_ttm_copy_mem_to_mem
Christian König [Wed, 17 Feb 2021 11:37:53 +0000 (12:37 +0100)]
drm/amdgpu: use the new cursor in amdgpu_ttm_copy_mem_to_mem

Separate the drm_mm_node walking from the actual handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: new resource cursor (v2)
Christian König [Wed, 17 Feb 2021 11:36:15 +0000 (12:36 +0100)]
drm/amdgpu: new resource cursor (v2)

Allows to walk over the drm_mm nodes in a TTM resource object.

v2: squash in fix from Felix

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Oak Zeng <Oak.Zeng@amd.com>
Tested-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Arunpravin <Arunpravin.PaneerSelvam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Free PDB0 bo before bo_fini
Lijo Lazar [Wed, 10 Mar 2021 10:36:18 +0000 (18:36 +0800)]
drm/amdgpu: Free PDB0 bo before bo_fini

Cleanup pdb0 bo before bo_fini gets called

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: support query ecc cap for SIENNA_CICHLID
Hawking Zhang [Tue, 9 Mar 2021 11:36:19 +0000 (19:36 +0800)]
drm/amdgpu: support query ecc cap for SIENNA_CICHLID

driver needs to query umc_info_v3_3 for ecc capability
in sienna_cichlid

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: update umc_info v3_3 structure for ECC
Hawking Zhang [Tue, 9 Mar 2021 10:47:49 +0000 (18:47 +0800)]
drm/amdgpu: update umc_info v3_3 structure for ECC

new member introduced in umc_info v3_3 to indicate
ECC capability

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix a few compiler warnings
Oak Zeng [Thu, 11 Mar 2021 03:23:54 +0000 (21:23 -0600)]
drm/amdgpu: fix a few compiler warnings

1. make function mmhub_v1_7_setup_vm_pt_regs static
2. indent a if statement

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix compile error on architecture s390 (v2)
Oak Zeng [Wed, 10 Mar 2021 19:09:42 +0000 (13:09 -0600)]
drm/amdgpu: fix compile error on architecture s390 (v2)

ioremap_cache is not supported on some architecture
such as s390. Put the codes into a #ifdef to fix
some compile error reported by test robot.

v2: squash in non-x86 fix

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reported-by: Kernel test robot <lkp@intel.com>
Reviewed-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agoRevert "drm/amdgpu: During compute disable GFXOFF for Sienna_Cichlid"
Harish Kasiviswanathan [Tue, 9 Mar 2021 16:41:09 +0000 (11:41 -0500)]
Revert "drm/amdgpu: During compute disable GFXOFF for Sienna_Cichlid"

This reverts commit 73bf5cad2696fe3a21f70101821405db839ea18e.

Fixed in newer firmware

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: fix build error with AMD_IOMMU_V2=m
Felix Kuehling [Tue, 9 Mar 2021 03:15:42 +0000 (22:15 -0500)]
drm/amdkfd: fix build error with AMD_IOMMU_V2=m

Using 'imply AMD_IOMMU_V2' does not guarantee that the driver can link
against the exported functions. If the GPU driver is built-in but the
IOMMU driver is a loadable module, the kfd_iommu.c file is indeed
built but does not work:

x86_64-linux-ld: drivers/gpu/drm/amd/amdkfd/kfd_iommu.o: in function `kfd_iommu_bind_process_to_device':
kfd_iommu.c:(.text+0x516): undefined reference to `amd_iommu_bind_pasid'
x86_64-linux-ld: drivers/gpu/drm/amd/amdkfd/kfd_iommu.o: in function `kfd_iommu_unbind_process':
kfd_iommu.c:(.text+0x691): undefined reference to `amd_iommu_unbind_pasid'
x86_64-linux-ld: drivers/gpu/drm/amd/amdkfd/kfd_iommu.o: in function `kfd_iommu_suspend':
kfd_iommu.c:(.text+0x966): undefined reference to `amd_iommu_set_invalidate_ctx_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0x97f): undefined reference to `amd_iommu_set_invalid_ppr_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0x9a4): undefined reference to `amd_iommu_free_device'
x86_64-linux-ld: drivers/gpu/drm/amd/amdkfd/kfd_iommu.o: in function `kfd_iommu_resume':
kfd_iommu.c:(.text+0xa9a): undefined reference to `amd_iommu_init_device'
x86_64-linux-ld: kfd_iommu.c:(.text+0xadc): undefined reference to `amd_iommu_set_invalidate_ctx_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0xaff): undefined reference to `amd_iommu_set_invalid_ppr_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0xc72): undefined reference to `amd_iommu_bind_pasid'
x86_64-linux-ld: kfd_iommu.c:(.text+0xe08): undefined reference to `amd_iommu_set_invalidate_ctx_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0xe26): undefined reference to `amd_iommu_set_invalid_ppr_cb'
x86_64-linux-ld: kfd_iommu.c:(.text+0xe42): undefined reference to `amd_iommu_free_device'

Use IS_REACHABLE to only build IOMMU-V2 support if the amd_iommu symbols
are reachable by the amdkfd driver. Output a warning if they are not,
because that may not be what the user was expecting.

Fixes: 64d1c3a43a6f ("drm/amdkfd: Centralize IOMMUv2 code and make it conditional")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Replace in_task() in gfx_v8_0_parse_sq_irq()
Sebastian Andrzej Siewior [Tue, 9 Feb 2021 12:44:39 +0000 (13:44 +0100)]
drm/amdgpu: Replace in_task() in gfx_v8_0_parse_sq_irq()

gfx_v8_0_parse_sq_irq() is using in_task() to distinguish if it is
invoked from a workqueue worker or directly from the interrupt handler.

The usage of in_interrupt() in drivers is phased out and Linus clearly
requested that code which changes behaviour depending on context should
either be separated or the context be conveyed in an argument passed by the
caller, which usually knows the context.

gfx_v8_0_parse_sq_irq() is invoked directly either from a worker or from
the interrupt service routine. The worker is only bypassed if the worker
is already busy.

Add an argument `from_wq' to gfx_v8_0_parse_sq_irq() which is true if
invoked from the worker.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove in_interrupt() usage in gfx_v9_0_kiq_read_clock()
Sebastian Andrzej Siewior [Tue, 9 Feb 2021 12:44:38 +0000 (13:44 +0100)]
drm/amdgpu: Remove in_interrupt() usage in gfx_v9_0_kiq_read_clock()

gfx_v9_0_get_gpu_clock_counter() acquires a mutex_t lock and is the only
caller of gfx_v9_0_kiq_read_clock().
If it safe to acquire a mutex_t then gfx_v9_0_get_gpu_clock_counter() is
always invoked from preemptible context.

Remove in_interrupt() because it superfluous as it will always return
false.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Replace in_interrupt() usage in gmc_v*_process_interrupt()
Sebastian Andrzej Siewior [Tue, 9 Feb 2021 12:44:37 +0000 (13:44 +0100)]
drm/amdgpu: Replace in_interrupt() usage in gmc_v*_process_interrupt()

The usage of in_interrupt() in gmc_v*_process_interrupt() is intended to
use a different code path if invoked from the interrupt handler vs
invoked from the workqueue.

The usage of in_interrupt() in drivers is phased out and Linus clearly
requested that code which changes behaviour depending on context should
either be separated or the context be conveyed in an argument passed by the
caller, which usually knows the context.

gmc_v*_process_interrupt() is invoked via the ->process() callback
from amdgpu_ih_process() which in turn is invoked either from
amdgpu_irq_handler() (the interrupt handler) or from
amdgpu_irq_handle_*() which is a workqueue.

amdgpu_irq::ih is always processed from the interrupt handler, the other
three struct amdgpu_ih_ring members are processed from a workqueue.

Replace the in_interrupt() check with a comparison against adev->irq.ih.
A similar check is already done to check if the ih pointer is from
ih_soft.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Fix spelling mistake "disabed" -> "disabled"
Colin Ian King [Thu, 11 Mar 2021 09:28:30 +0000 (09:28 +0000)]
drm/amdgpu: Fix spelling mistake "disabed" -> "disabled"

There is a spelling mistake in a drm debug message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/smu8: return an error rather than 50% if busy query fails
Alex Deucher [Wed, 10 Mar 2021 17:08:42 +0000 (12:08 -0500)]
drm/amdgpu/smu8: return an error rather than 50% if busy query fails

For consistency with SMU10.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/powerplay/smu10: add support for gpu busy query (v2)
Alex Deucher [Tue, 9 Mar 2021 16:29:54 +0000 (11:29 -0500)]
drm/amdgpu/powerplay/smu10: add support for gpu busy query (v2)

Was added in newer versions of the firmware.  Add support
for it.

v2: return an error in SMU error, drop needless break.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: workaround for audio noise issue
Kenneth Feng [Thu, 11 Mar 2021 04:19:57 +0000 (12:19 +0800)]
drm/amd/pm: workaround for audio noise issue

On some Intel platforms, audio noise can be detected due to
high pcie speed switch latency.
This patch leaverages ppfeaturemask to fix to the highest pcie
speed then disable pcie switching.

v2:
coding style fix

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: update secure display TA header
Jinzhou Su [Tue, 9 Mar 2021 02:52:14 +0000 (10:52 +0800)]
drm/amdgpu: update secure display TA header

update secure display TA header file.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu:disable XGMI TA unload for A+A aldebaran
Feifei Xu [Wed, 10 Mar 2021 14:04:32 +0000 (22:04 +0800)]
drm/amdgpu:disable XGMI TA unload for A+A aldebaran

In gpu reset, XGMI TA unload will cause gpu hang.
Skip it on A+A aldebaran.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: remove duplicate include in amdgpu_dm.c
Anson Jacob [Wed, 10 Mar 2021 15:24:20 +0000 (10:24 -0500)]
drm/amd/display: remove duplicate include in amdgpu_dm.c

'drm/drm_hdcp.h' included in 'amdgpu_dm.c' is duplicated.

Reported-by: Zhang Yunkai <zhang.yunkai@zte.com.cn>
Signed-off-by: Anson Jacob <Anson.Jacob@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agoRevert "drm/amd/display: remove duplicate include in amdgpu_dm.c"
Anson Jacob [Wed, 10 Mar 2021 15:20:42 +0000 (10:20 -0500)]
Revert "drm/amd/display: remove duplicate include in amdgpu_dm.c"

This reverts commit 51713e4e540b1adb49d4024323e43abb39a89577.

The duplicate from #79 should be removed instead.

Signed-off-by: Anson Jacob <Anson.Jacob@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Enable light SBR for SMU on passthrough and XGMI configuration
shaoyunl [Wed, 10 Mar 2021 17:51:39 +0000 (12:51 -0500)]
drm/amdgpu: Enable light SBR for SMU on passthrough and XGMI configuration

SMU introduce the new interface to enable light Secondary Bus Reset mode, driver
enable it on passthrough + XGMI configuration

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: Add LightSBR SMU MSG support
shaoyunl [Wed, 10 Mar 2021 17:03:37 +0000 (12:03 -0500)]
drm/amd/pm: Add LightSBR SMU MSG support

This new MSG provide the interface for driver to enable/disable the Light Secondary Bus Reset
support from SMU. When enabled, SMU will only do minimum NBIO response to the SBR request and
leave the real HW reset to be handled by driver later. When disabled (default state),SMU will
pass the request to PSP for a HW reset

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: skip read eeprom for device that pending on XGMI reset
shaoyunl [Wed, 10 Mar 2021 01:02:42 +0000 (20:02 -0500)]
drm/amdgpu: skip read eeprom for device that pending on XGMI reset

Read eeprom through SMU doesn't works stable on XGMI reset during test.
skip it for now

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Remove unused defines
Qingqing Zhuo [Wed, 10 Mar 2021 17:15:29 +0000 (12:15 -0500)]
drm/amd/display: Remove unused defines

[Why]
CONFIG_DRM_AMD_DC_DCN3_0 has been folded into
CONFIG_DRM_AMD_DC_DCN and is not needed.

[How]
Drop CONFIG_DRM_AMD_DC_DCN3_0.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix S0ix handling when the CONFIG_AMD_PMC=m
Alex Deucher [Wed, 10 Mar 2021 03:58:47 +0000 (22:58 -0500)]
drm/amdgpu: fix S0ix handling when the CONFIG_AMD_PMC=m

Need to check the module variant as well.

Acked-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/radeon: keep __user during cast
Christian König [Mon, 8 Mar 2021 18:15:42 +0000 (19:15 +0100)]
drm/radeon: keep __user during cast

Silence static checker warning.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/radeon: fix AGP dependency
Christian König [Mon, 8 Mar 2021 18:22:13 +0000 (19:22 +0100)]
drm/radeon: fix AGP dependency

When AGP is compiled as module radeon must be compiled as module as
well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/radeon: also init GEM funcs in radeon_gem_prime_import_sg_table
Christian König [Mon, 8 Mar 2021 18:35:14 +0000 (19:35 +0100)]
drm/radeon: also init GEM funcs in radeon_gem_prime_import_sg_table

Otherwise we will run into a NULL ptr deref.

Signed-off-by: Christian König <christian.koenig@amd.com>
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=212137
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: correct the watermark settings for Polaris
Evan Quan [Fri, 5 Mar 2021 06:21:26 +0000 (14:21 +0800)]
drm/amd/pm: correct the watermark settings for Polaris

The "/ 10" should be applied to the right-hand operand instead of
the left-hand one.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Noticed-by: Georgios Toptsidis <gtoptsid@gmail.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4f
shaoyunl [Tue, 9 Mar 2021 15:30:15 +0000 (10:30 -0500)]
drm/amdgpu : Fix asic reset regression issue introduce by 8f211fe8ac7c4f

This recent change introduce SDMA interrupt info printing with irq->process function.
These functions do not require a set function to enable/disable the irq

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: bug fix for pcie dpm
Kenneth Feng [Tue, 9 Mar 2021 13:10:16 +0000 (21:10 +0800)]
drm/amd/pm: bug fix for pcie dpm

Currently the pcie dpm has two problems.
1. Only the high dpm level speed/width can be overrided
if the requested values are out of the pcie capability.
2. The high dpm level is always overrided though sometimes
it's not necesarry.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: add ih waiter on process until checkpoint
Jonathan Kim [Tue, 23 Feb 2021 20:10:33 +0000 (15:10 -0500)]
drm/amdgpu: add ih waiter on process until checkpoint

Add IH function to allow caller to wait until ring entries are processed
until the checkpoint write pointer.

This will be primarily used by HMM to drain pending page fault interrupts
before memory unmap to prevent HMM from handling stale interrupts.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/display: Implement functions to let DC allocate GPU memory
Zhan Liu [Tue, 9 Mar 2021 01:20:44 +0000 (20:20 -0500)]
drm/amdgpu/display: Implement functions to let DC allocate GPU memory

[Why]
DC needs to communicate with PM FW through GPU memory. In order
to do so we need to be able to allocate memory from within DC.

[How]
Call amdgpu_bo_create_kernel to allocate GPU memory and use a
list in amdgpu_display_manager to track our allocations so we
can clean them up later.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Zhan Liu <zhan.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/display: Use wm_table.entries for dcn301 calculate_wm
Zhan Liu [Tue, 9 Mar 2021 01:28:22 +0000 (20:28 -0500)]
drm/amdgpu/display: Use wm_table.entries for dcn301 calculate_wm

[Why]
For DGPU Navi, the wm_table.nv_entries are used. These entires are not
populated for DCN301 Vangogh APU, but instead wm_table.entries are.

[How]
Use DCN21 Renoir style wm calculations.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Zhan Liu <zhan.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fb BO should be ttm_bo_type_device
Nirmoy Das [Mon, 8 Mar 2021 14:22:22 +0000 (15:22 +0100)]
drm/amdgpu: fb BO should be ttm_bo_type_device

FB BO should not be ttm_bo_type_kernel type and
amdgpufb_create_pinned_object() pins the FB BO anyway.

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Reset the devices in the XGMI hive duirng probe
shaoyunl [Tue, 16 Feb 2021 17:50:42 +0000 (12:50 -0500)]
drm/amdgpu: Reset the devices in the XGMI hive duirng probe

In passthrough configuration, hypervisior will trigger the SBR(Secondary bus reset) to the devices
without sync to each other. This could cause device hang since for XGMI configuration, all the devices
within the hive need to be reset at a limit time slot. This serial of patches try to solve this issue
by co-operate with new SMU which will only do minimum house keeping to response the SBR request but don't
do the real reset job and leave it to driver. Driver need to do the whole sw init and minimum HW init
to bring up the SMU and trigger the reset(possibly BACO) on all the ASICs at the same time

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Andrey Grodzovsky andrey.grodzovsky@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Add reset_list for device list used for reset
shaoyunl [Fri, 5 Mar 2021 02:58:29 +0000 (21:58 -0500)]
drm/amdgpu: Add reset_list for device list used for reset

The gmc.xgmi.head list originally is designed for device list in the XGMI hive. Mix use it
for reset purpose will prevent the reset function to adjust XGMI device list which is required
in next change

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Andrey Grodzovsky andrey.grodzovsky@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Init the cp MQD if it's not be initialized before
shaoyunl [Tue, 16 Feb 2021 16:27:04 +0000 (11:27 -0500)]
drm/amdgpu: Init the cp MQD if it's not be initialized before

The MQD might not be initialized duirng first init period if the device need to be reset
druing probe. Driver need to proper init them in gpu recovery period

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Add kfd init_complete flag to check from amdgpu side
shaoyunl [Tue, 16 Feb 2021 15:57:17 +0000 (10:57 -0500)]
drm/amdgpu: Add kfd init_complete flag to check from amdgpu side

amdgpu driver may be in reset state during init which will not initialize the kfd,
driver need to initialize the KFD after reset by check the flag

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>