Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f...
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 26 Mar 2021 14:52:01 +0000 (15:52 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 26 Mar 2021 14:53:21 +0000 (15:53 +0100)
amd-drm-next-5.13-2021-03-23:

amdgpu:
- Debugfs cleanup
- Various cleanups and spelling fixes
- Flexible array cleanups
- Initial AMD Freesync HDMI
- Display fixes
- 10bpc dithering improvements
- Display ASSR support
- Clean up and unify powerplay and swsmu interfaces
- Vangogh fixes
- Add SMU gfx busy queues for RV/PCO
- PCIE DPM fixes
- S0ix fixes
- GPU metrics data fixes
- DCN secure display support
- Backlight type override
- Add initial support for Aldebaran
- RAS fixes
- Prime fixes for A+A systems
- Reset fixes
- Initial resource cursor support
- Drop legacy IO BAR requirements
- Various power fixes

amdkfd:
- MMU notifier fixes
- APU fixes

radeon:
- Debugfs cleanups
- Flexible array cleanups

UAPI:
- amdgpu: Add a new INFO ioctl interface to query video capabilities
  rather than hardcoding them in userspace.  This allows us to provide
  fine grained asic capabilities (e.g., if a particular part is
  bandwidth limited, we can limit the capabilities).  Proposed userspace:
  https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps
  https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps
- amdkfd: bump the driver version.  There was a problem with reporting
  some RAS features on older versions of the driver. Proposed userspace:
  https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21

Danvet: A bunch of conflicts all over, but it seems to compile ... I
did put the call to dc_allow_idle_optimizations() on a single line
since it looked a bit too jarring to be left alone.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com
14 files changed:
1  2 
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_ttm.c

Simple merge
@@@ -951,9 -990,8 +990,7 @@@ static void event_mall_stutter(struct w
        else
                dm->active_vblank_irq_count--;
  
--      dc_allow_idle_optimizations(
-               dm->dc, dm->active_vblank_irq_count == 0 ? true : false);
 -              dm->dc, dm->active_vblank_irq_count == 0);
++      dc_allow_idle_optimizations(dm->dc, dm->active_vblank_irq_count == 0);
  
        DRM_DEBUG_DRIVER("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0);
  
@@@ -1718,7 -1626,8 +1720,8 @@@ static struct resource_funcs dcn301_res
        .link_enc_create = dcn301_link_encoder_create,
        .panel_cntl_create = dcn301_panel_cntl_create,
        .validate_bandwidth = dcn30_validate_bandwidth,
 -      .calculate_wm_and_dlg = dcn30_calculate_wm_and_dlg,
 +      .calculate_wm_and_dlg = dcn301_calculate_wm_and_dlg,
+       .update_soc_for_wm_a = dcn30_update_soc_for_wm_a,
        .populate_dml_pipes = dcn30_populate_dml_pipes_from_context,
        .acquire_idle_pipe_for_layer = dcn20_acquire_idle_pipe_for_layer,
        .add_stream_to_ctx = dcn30_add_stream_to_ctx,
@@@ -173,6 -187,16 +187,12 @@@ static const struct irq_source_info_fun
        .ack = NULL
  };
  
 -static const struct irq_source_info_funcs dmub_trace_irq_info_funcs = {
 -      .set = NULL,
 -      .ack = NULL
 -};
+ static const struct irq_source_info_funcs vline0_irq_info_funcs = {
+       .set = NULL,
+       .ack = NULL
+ };
  #undef BASE_INNER
  #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
  
@@@ -451,13 -451,8 +451,8 @@@ struct radeon_surface_reg 
   * TTM.
   */
  struct radeon_mman {
 -      struct ttm_bo_device            bdev;
 +      struct ttm_device               bdev;
        bool                            initialized;
- #if defined(CONFIG_DEBUG_FS)
-       struct dentry                   *vram;
-       struct dentry                   *gtt;
- #endif
  };
  
  struct radeon_bo_list {
  #include "radeon.h"
  #include "radeon_ttm.h"
  
- static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
- static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
+ static void radeon_ttm_debugfs_init(struct radeon_device *rdev);
  
 -static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
 -                            struct ttm_tt *ttm,
 +static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
                              struct ttm_resource *bo_mem);
 -static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
 -                               struct ttm_tt *ttm);
 +static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
  
 -struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
 +struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
  {
        struct radeon_mman *mman;
        struct radeon_device *rdev;