Merge v5.10-rc3 into drm-next
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 10 Nov 2020 12:58:05 +0000 (13:58 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 10 Nov 2020 13:36:36 +0000 (14:36 +0100)
We need commit f8f6ae5d077a ("mm: always have io_remap_pfn_range() set
pgprot_decrypted()") to be able to merge Jason's cleanup patch.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
1  2 
MAINTAINERS
drivers/gpu/drm/amd/display/include/dal_asic_id.h
drivers/gpu/drm/i915/gvt/handlers.c
drivers/gpu/drm/panfrost/panfrost_drv.c
drivers/gpu/drm/panfrost/panfrost_gem.c
drivers/gpu/drm/vc4/vc4_bo.c
drivers/gpu/drm/vc4/vc4_drv.c
drivers/gpu/drm/vc4/vc4_drv.h
drivers/gpu/drm/vc4/vc4_hvs.c

diff --cc MAINTAINERS
Simple merge
@@@ -203,20 -202,13 +203,24 @@@ enum 
  #define ASICREV_IS_NAVI12_P(eChipRev)        ((eChipRev >= NV_NAVI12_P_A0) && (eChipRev < NV_NAVI14_M_A0))
  #define ASICREV_IS_NAVI14_M(eChipRev)        ((eChipRev >= NV_NAVI14_M_A0) && (eChipRev < NV_UNKNOWN))
  #define ASICREV_IS_RENOIR(eChipRev) ((eChipRev >= RENOIR_A0) && (eChipRev < RAVEN1_F0))
 -#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
 -#define ASICREV_IS_SIENNA_CICHLID_P(eChipRev)        ((eChipRev >= NV_SIENNA_CICHLID_P_A0))
 +#define ASICREV_IS_SIENNA_CICHLID_P(eChipRev)        ((eChipRev >= NV_SIENNA_CICHLID_P_A0) && (eChipRev < NV_DIMGREY_CAVEFISH_P_A0))
 +#define ASICREV_IS_DIMGREY_CAVEFISH_P(eChipRev)        ((eChipRev >= NV_DIMGREY_CAVEFISH_P_A0) && (eChipRev < NV_UNKNOWN))
 +#define GREEN_SARDINE_A0 0xA1
 +#ifndef ASICREV_IS_GREEN_SARDINE
 +#define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF))
 +#endif
 +#define FAMILY_VGH 144
 +#define DEVICE_ID_VGH_163F 0x163F
 +#define VANGOGH_A0 0x01
 +#define VANGOGH_UNKNOWN 0xFF
 +
 +#ifndef ASICREV_IS_VANGOGH
 +#define ASICREV_IS_VANGOGH(eChipRev) ((eChipRev >= VANGOGH_A0) && (eChipRev < VANGOGH_UNKNOWN))
  #endif
+ #define GREEN_SARDINE_A0 0xA1
+ #ifndef ASICREV_IS_GREEN_SARDINE
+ #define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF))
+ #endif
  
  /*
   * ASIC chip ID
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge