drm/amd/pm: correct gpu metrics related data structures V3
authorEvan Quan <evan.quan@amd.com>
Fri, 26 Feb 2021 07:11:45 +0000 (15:11 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 5 Mar 2021 20:09:25 +0000 (15:09 -0500)
To make sure they are naturally aligned. Also updating the
data type for link_speed/width for future PCIE5 support.

V2: define new structures with minor version bumped
V3: update data type of energy_accumulator as 64bit and
    drop unnecessary padding members

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/kgd_pp_interface.h

index 7621eab..b26a6f4 100644 (file)
@@ -340,6 +340,10 @@ struct metrics_table_header {
        uint8_t                         content_revision;
 };
 
+/*
+ * gpu_metrics_v1_0 is not recommended as it's not naturally aligned.
+ * Use gpu_metrics_v1_1 or later instead.
+ */
 struct gpu_metrics_v1_0 {
        struct metrics_table_header     common_header;
 
@@ -392,6 +396,64 @@ struct gpu_metrics_v1_0 {
        uint8_t                         pcie_link_speed; // in 0.1 GT/s
 };
 
+struct gpu_metrics_v1_1 {
+       struct metrics_table_header     common_header;
+
+       /* Temperature */
+       uint16_t                        temperature_edge;
+       uint16_t                        temperature_hotspot;
+       uint16_t                        temperature_mem;
+       uint16_t                        temperature_vrgfx;
+       uint16_t                        temperature_vrsoc;
+       uint16_t                        temperature_vrmem;
+
+       /* Utilization */
+       uint16_t                        average_gfx_activity;
+       uint16_t                        average_umc_activity; // memory controller
+       uint16_t                        average_mm_activity; // UVD or VCN
+
+       /* Power/Energy */
+       uint16_t                        average_socket_power;
+       uint64_t                        energy_accumulator;
+
+       /* Driver attached timestamp (in ns) */
+       uint64_t                        system_clock_counter;
+
+       /* Average clocks */
+       uint16_t                        average_gfxclk_frequency;
+       uint16_t                        average_socclk_frequency;
+       uint16_t                        average_uclk_frequency;
+       uint16_t                        average_vclk0_frequency;
+       uint16_t                        average_dclk0_frequency;
+       uint16_t                        average_vclk1_frequency;
+       uint16_t                        average_dclk1_frequency;
+
+       /* Current clocks */
+       uint16_t                        current_gfxclk;
+       uint16_t                        current_socclk;
+       uint16_t                        current_uclk;
+       uint16_t                        current_vclk0;
+       uint16_t                        current_dclk0;
+       uint16_t                        current_vclk1;
+       uint16_t                        current_dclk1;
+
+       /* Throttle status */
+       uint32_t                        throttle_status;
+
+       /* Fans */
+       uint16_t                        current_fan_speed;
+
+       /* Link width/speed */
+       uint16_t                        pcie_link_width;
+       uint16_t                        pcie_link_speed; // in 0.1 GT/s
+
+       uint16_t                        padding;
+};
+
+/*
+ * gpu_metrics_v2_0 is not recommended as it's not naturally aligned.
+ * Use gpu_metrics_v2_1 or later instead.
+ */
 struct gpu_metrics_v2_0 {
        struct metrics_table_header     common_header;
 
@@ -442,4 +504,54 @@ struct gpu_metrics_v2_0 {
        uint16_t                        padding;
 };
 
+struct gpu_metrics_v2_1 {
+       struct metrics_table_header     common_header;
+
+       /* Temperature */
+       uint16_t                        temperature_gfx; // gfx temperature on APUs
+       uint16_t                        temperature_soc; // soc temperature on APUs
+       uint16_t                        temperature_core[8]; // CPU core temperature on APUs
+       uint16_t                        temperature_l3[2];
+
+       /* Utilization */
+       uint16_t                        average_gfx_activity;
+       uint16_t                        average_mm_activity; // UVD or VCN
+
+       /* Driver attached timestamp (in ns) */
+       uint64_t                        system_clock_counter;
+
+       /* Power/Energy */
+       uint16_t                        average_socket_power; // dGPU + APU power on A + A platform
+       uint16_t                        average_cpu_power;
+       uint16_t                        average_soc_power;
+       uint16_t                        average_gfx_power;
+       uint16_t                        average_core_power[8]; // CPU core power on APUs
+
+       /* Average clocks */
+       uint16_t                        average_gfxclk_frequency;
+       uint16_t                        average_socclk_frequency;
+       uint16_t                        average_uclk_frequency;
+       uint16_t                        average_fclk_frequency;
+       uint16_t                        average_vclk_frequency;
+       uint16_t                        average_dclk_frequency;
+
+       /* Current clocks */
+       uint16_t                        current_gfxclk;
+       uint16_t                        current_socclk;
+       uint16_t                        current_uclk;
+       uint16_t                        current_fclk;
+       uint16_t                        current_vclk;
+       uint16_t                        current_dclk;
+       uint16_t                        current_coreclk[8]; // CPU core clocks
+       uint16_t                        current_l3clk[2];
+
+       /* Throttle status */
+       uint32_t                        throttle_status;
+
+       /* Fans */
+       uint16_t                        fan_pwm;
+
+       uint16_t                        padding[3];
+};
+
 #endif