ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger
authorMatthias Kaehlcke <mka@chromium.org>
Mon, 6 Jan 2020 21:52:13 +0000 (13:52 -0800)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 7 Jan 2020 21:52:40 +0000 (22:52 +0100)
commit1f5e928340061bc9729c82591ec4379909e708d6
tree6987dd86f345bc7110d0703f429ae9f18c0c2bba
parente964d463392d70d801c15f83d02e61671f35d549
ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger

The flash write protect pin is currently named 'FW_WP_AP', which is
how the signal is called in the schematics. The Chrome OS ABI
requires the pin to be named 'AP_FLASH_WP_L', which is also how
it is called on all other veyron devices. Rename the pin to match
the ABI.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200106135142.1.I3f99ac8399a564c88ff48ae6290cc691b47c16ae@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3288-veyron-fievel.dts