2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define SAMPLE_COUNT 3
37 #define BYT_RATIOS 0x66a
38 #define BYT_VIDS 0x66b
39 #define BYT_TURBO_RATIOS 0x66c
43 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
44 #define fp_toint(X) ((X) >> FRAC_BITS)
46 static inline int32_t mul_fp(int32_t x, int32_t y)
48 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
51 static inline int32_t div_fp(int32_t x, int32_t y)
53 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
57 int32_t core_pct_busy;
60 unsigned long long tsc;
92 struct timer_list timer;
94 struct pstate_data pstate;
100 unsigned long long prev_tsc;
102 struct sample samples[SAMPLE_COUNT];
105 static struct cpudata **all_cpu_data;
106 struct pstate_adjust_policy {
115 struct pstate_funcs {
116 int (*get_max)(void);
117 int (*get_min)(void);
118 int (*get_turbo)(void);
119 void (*set)(struct cpudata*, int pstate);
120 void (*get_vid)(struct cpudata *);
123 struct cpu_defaults {
124 struct pstate_adjust_policy pid_policy;
125 struct pstate_funcs funcs;
128 static struct pstate_adjust_policy pid_params;
129 static struct pstate_funcs pstate_funcs;
141 static struct perf_limits limits = {
144 .max_perf = int_tofp(1),
147 .max_policy_pct = 100,
148 .max_sysfs_pct = 100,
151 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
152 int deadband, int integral) {
153 pid->setpoint = setpoint;
154 pid->deadband = deadband;
155 pid->integral = int_tofp(integral);
156 pid->last_err = setpoint - busy;
159 static inline void pid_p_gain_set(struct _pid *pid, int percent)
161 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
164 static inline void pid_i_gain_set(struct _pid *pid, int percent)
166 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
169 static inline void pid_d_gain_set(struct _pid *pid, int percent)
172 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
175 static signed int pid_calc(struct _pid *pid, int32_t busy)
178 int32_t pterm, dterm, fp_error;
179 int32_t integral_limit;
181 fp_error = int_tofp(pid->setpoint) - busy;
183 if (abs(fp_error) <= int_tofp(pid->deadband))
186 pterm = mul_fp(pid->p_gain, fp_error);
188 pid->integral += fp_error;
190 /* limit the integral term */
191 integral_limit = int_tofp(30);
192 if (pid->integral > integral_limit)
193 pid->integral = integral_limit;
194 if (pid->integral < -integral_limit)
195 pid->integral = -integral_limit;
197 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
198 pid->last_err = fp_error;
200 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
202 return (signed int)fp_toint(result);
205 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
207 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
208 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
209 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
218 static inline void intel_pstate_reset_all_pid(void)
221 for_each_online_cpu(cpu) {
222 if (all_cpu_data[cpu])
223 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
227 /************************** debugfs begin ************************/
228 static int pid_param_set(void *data, u64 val)
231 intel_pstate_reset_all_pid();
234 static int pid_param_get(void *data, u64 *val)
239 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
240 pid_param_set, "%llu\n");
247 static struct pid_param pid_files[] = {
248 {"sample_rate_ms", &pid_params.sample_rate_ms},
249 {"d_gain_pct", &pid_params.d_gain_pct},
250 {"i_gain_pct", &pid_params.i_gain_pct},
251 {"deadband", &pid_params.deadband},
252 {"setpoint", &pid_params.setpoint},
253 {"p_gain_pct", &pid_params.p_gain_pct},
257 static struct dentry *debugfs_parent;
258 static void intel_pstate_debug_expose_params(void)
262 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
263 if (IS_ERR_OR_NULL(debugfs_parent))
265 while (pid_files[i].name) {
266 debugfs_create_file(pid_files[i].name, 0660,
267 debugfs_parent, pid_files[i].value,
273 /************************** debugfs end ************************/
275 /************************** sysfs begin ************************/
276 #define show_one(file_name, object) \
277 static ssize_t show_##file_name \
278 (struct kobject *kobj, struct attribute *attr, char *buf) \
280 return sprintf(buf, "%u\n", limits.object); \
283 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
284 const char *buf, size_t count)
288 ret = sscanf(buf, "%u", &input);
291 limits.no_turbo = clamp_t(int, input, 0 , 1);
296 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
297 const char *buf, size_t count)
301 ret = sscanf(buf, "%u", &input);
305 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
306 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
307 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
311 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
312 const char *buf, size_t count)
316 ret = sscanf(buf, "%u", &input);
319 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
320 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
325 show_one(no_turbo, no_turbo);
326 show_one(max_perf_pct, max_perf_pct);
327 show_one(min_perf_pct, min_perf_pct);
329 define_one_global_rw(no_turbo);
330 define_one_global_rw(max_perf_pct);
331 define_one_global_rw(min_perf_pct);
333 static struct attribute *intel_pstate_attributes[] = {
340 static struct attribute_group intel_pstate_attr_group = {
341 .attrs = intel_pstate_attributes,
343 static struct kobject *intel_pstate_kobject;
345 static void intel_pstate_sysfs_expose_params(void)
349 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
350 &cpu_subsys.dev_root->kobj);
351 BUG_ON(!intel_pstate_kobject);
352 rc = sysfs_create_group(intel_pstate_kobject,
353 &intel_pstate_attr_group);
357 /************************** sysfs end ************************/
358 static int byt_get_min_pstate(void)
361 rdmsrl(BYT_RATIOS, value);
362 return (value >> 8) & 0xFF;
365 static int byt_get_max_pstate(void)
368 rdmsrl(BYT_RATIOS, value);
369 return (value >> 16) & 0xFF;
372 static int byt_get_turbo_pstate(void)
375 rdmsrl(BYT_TURBO_RATIOS, value);
379 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
389 vid_fp = cpudata->vid.min + mul_fp(
390 int_tofp(pstate - cpudata->pstate.min_pstate),
393 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
394 vid = fp_toint(vid_fp);
398 wrmsrl(MSR_IA32_PERF_CTL, val);
401 static void byt_get_vid(struct cpudata *cpudata)
405 rdmsrl(BYT_VIDS, value);
406 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
407 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
408 cpudata->vid.ratio = div_fp(
409 cpudata->vid.max - cpudata->vid.min,
410 int_tofp(cpudata->pstate.max_pstate -
411 cpudata->pstate.min_pstate));
415 static int core_get_min_pstate(void)
418 rdmsrl(MSR_PLATFORM_INFO, value);
419 return (value >> 40) & 0xFF;
422 static int core_get_max_pstate(void)
425 rdmsrl(MSR_PLATFORM_INFO, value);
426 return (value >> 8) & 0xFF;
429 static int core_get_turbo_pstate(void)
433 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
434 nont = core_get_max_pstate();
435 ret = ((value) & 255);
441 static void core_set_pstate(struct cpudata *cpudata, int pstate)
449 wrmsrl(MSR_IA32_PERF_CTL, val);
452 static struct cpu_defaults core_params = {
454 .sample_rate_ms = 10,
462 .get_max = core_get_max_pstate,
463 .get_min = core_get_min_pstate,
464 .get_turbo = core_get_turbo_pstate,
465 .set = core_set_pstate,
469 static struct cpu_defaults byt_params = {
471 .sample_rate_ms = 10,
479 .get_max = byt_get_max_pstate,
480 .get_min = byt_get_min_pstate,
481 .get_turbo = byt_get_turbo_pstate,
482 .set = byt_set_pstate,
483 .get_vid = byt_get_vid,
488 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
490 int max_perf = cpu->pstate.turbo_pstate;
494 max_perf = cpu->pstate.max_pstate;
496 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
497 *max = clamp_t(int, max_perf_adj,
498 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
500 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
501 *min = clamp_t(int, min_perf,
502 cpu->pstate.min_pstate, max_perf);
505 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
507 int max_perf, min_perf;
509 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
511 pstate = clamp_t(int, pstate, min_perf, max_perf);
513 if (pstate == cpu->pstate.current_pstate)
516 trace_cpu_frequency(pstate * 100000, cpu->cpu);
518 cpu->pstate.current_pstate = pstate;
520 pstate_funcs.set(cpu, pstate);
523 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
526 target = cpu->pstate.current_pstate + steps;
528 intel_pstate_set_pstate(cpu, target);
531 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
534 target = cpu->pstate.current_pstate - steps;
535 intel_pstate_set_pstate(cpu, target);
538 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
540 sprintf(cpu->name, "Intel 2nd generation core");
542 cpu->pstate.min_pstate = pstate_funcs.get_min();
543 cpu->pstate.max_pstate = pstate_funcs.get_max();
544 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
546 if (pstate_funcs.get_vid)
547 pstate_funcs.get_vid(cpu);
550 * goto max pstate so we don't slow up boot if we are built-in if we are
551 * a module we will take care of it during normal operation
553 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
556 static inline void intel_pstate_calc_busy(struct cpudata *cpu,
557 struct sample *sample)
562 core_pct = div64_u64(sample->aperf * 100, sample->mperf);
564 c0_pct = div64_u64(sample->mperf * 100, sample->tsc);
565 sample->freq = fp_toint(
566 mul_fp(int_tofp(cpu->pstate.max_pstate),
567 int_tofp(core_pct * 1000)));
569 sample->core_pct_busy = mul_fp(int_tofp(core_pct),
570 div_fp(int_tofp(c0_pct + 1), int_tofp(100)));
573 static inline void intel_pstate_sample(struct cpudata *cpu)
576 unsigned long long tsc;
578 rdmsrl(MSR_IA32_APERF, aperf);
579 rdmsrl(MSR_IA32_MPERF, mperf);
580 tsc = native_read_tsc();
582 cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
583 cpu->samples[cpu->sample_ptr].aperf = aperf;
584 cpu->samples[cpu->sample_ptr].mperf = mperf;
585 cpu->samples[cpu->sample_ptr].tsc = tsc;
586 cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
587 cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
588 cpu->samples[cpu->sample_ptr].tsc -= cpu->prev_tsc;
590 intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
592 cpu->prev_aperf = aperf;
593 cpu->prev_mperf = mperf;
597 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
599 int sample_time, delay;
601 sample_time = pid_params.sample_rate_ms;
602 delay = msecs_to_jiffies(sample_time);
603 mod_timer_pinned(&cpu->timer, jiffies + delay);
606 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
608 int32_t core_busy, max_pstate, current_pstate;
610 core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
611 max_pstate = int_tofp(cpu->pstate.max_pstate);
612 current_pstate = int_tofp(cpu->pstate.current_pstate);
613 return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
616 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
624 busy_scaled = intel_pstate_get_scaled_busy(cpu);
626 ctl = pid_calc(pid, busy_scaled);
631 intel_pstate_pstate_increase(cpu, steps);
633 intel_pstate_pstate_decrease(cpu, steps);
636 static void intel_pstate_timer_func(unsigned long __data)
638 struct cpudata *cpu = (struct cpudata *) __data;
639 struct sample *sample;
641 intel_pstate_sample(cpu);
643 sample = &cpu->samples[cpu->sample_ptr];
645 intel_pstate_adjust_busy_pstate(cpu);
647 trace_pstate_sample(fp_toint(sample->core_pct_busy),
648 fp_toint(intel_pstate_get_scaled_busy(cpu)),
649 cpu->pstate.current_pstate,
654 intel_pstate_set_sample_time(cpu);
657 #define ICPU(model, policy) \
658 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
659 (unsigned long)&policy }
661 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
662 ICPU(0x2a, core_params),
663 ICPU(0x2d, core_params),
664 ICPU(0x37, byt_params),
665 ICPU(0x3a, core_params),
666 ICPU(0x3c, core_params),
667 ICPU(0x3e, core_params),
668 ICPU(0x3f, core_params),
669 ICPU(0x45, core_params),
670 ICPU(0x46, core_params),
673 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
675 static int intel_pstate_init_cpu(unsigned int cpunum)
678 const struct x86_cpu_id *id;
681 id = x86_match_cpu(intel_pstate_cpu_ids);
685 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
686 if (!all_cpu_data[cpunum])
689 cpu = all_cpu_data[cpunum];
691 intel_pstate_get_cpu_pstates(cpu);
692 if (!cpu->pstate.current_pstate) {
693 all_cpu_data[cpunum] = NULL;
700 init_timer_deferrable(&cpu->timer);
701 cpu->timer.function = intel_pstate_timer_func;
704 cpu->timer.expires = jiffies + HZ/100;
705 intel_pstate_busy_pid_reset(cpu);
706 intel_pstate_sample(cpu);
707 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
709 add_timer_on(&cpu->timer, cpunum);
711 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
716 static unsigned int intel_pstate_get(unsigned int cpu_num)
718 struct sample *sample;
721 cpu = all_cpu_data[cpu_num];
724 sample = &cpu->samples[cpu->sample_ptr];
728 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
732 cpu = all_cpu_data[policy->cpu];
734 if (!policy->cpuinfo.max_freq)
737 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
738 limits.min_perf_pct = 100;
739 limits.min_perf = int_tofp(1);
740 limits.max_perf_pct = 100;
741 limits.max_perf = int_tofp(1);
745 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
746 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
747 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
749 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
750 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
751 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
752 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
757 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
759 cpufreq_verify_within_cpu_limits(policy);
761 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
762 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
768 static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
770 int cpu = policy->cpu;
772 del_timer(&all_cpu_data[cpu]->timer);
773 kfree(all_cpu_data[cpu]);
774 all_cpu_data[cpu] = NULL;
778 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
783 rc = intel_pstate_init_cpu(policy->cpu);
787 cpu = all_cpu_data[policy->cpu];
789 if (!limits.no_turbo &&
790 limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
791 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
793 policy->policy = CPUFREQ_POLICY_POWERSAVE;
795 policy->min = cpu->pstate.min_pstate * 100000;
796 policy->max = cpu->pstate.turbo_pstate * 100000;
798 /* cpuinfo and default policy values */
799 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
800 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
801 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
802 cpumask_set_cpu(policy->cpu, policy->cpus);
807 static struct cpufreq_driver intel_pstate_driver = {
808 .flags = CPUFREQ_CONST_LOOPS,
809 .verify = intel_pstate_verify_policy,
810 .setpolicy = intel_pstate_set_policy,
811 .get = intel_pstate_get,
812 .init = intel_pstate_cpu_init,
813 .exit = intel_pstate_cpu_exit,
814 .name = "intel_pstate",
817 static int __initdata no_load;
819 static int intel_pstate_msrs_not_valid(void)
821 /* Check that all the msr's we are using are valid. */
822 u64 aperf, mperf, tmp;
824 rdmsrl(MSR_IA32_APERF, aperf);
825 rdmsrl(MSR_IA32_MPERF, mperf);
827 if (!pstate_funcs.get_max() ||
828 !pstate_funcs.get_min() ||
829 !pstate_funcs.get_turbo())
832 rdmsrl(MSR_IA32_APERF, tmp);
836 rdmsrl(MSR_IA32_MPERF, tmp);
843 static void copy_pid_params(struct pstate_adjust_policy *policy)
845 pid_params.sample_rate_ms = policy->sample_rate_ms;
846 pid_params.p_gain_pct = policy->p_gain_pct;
847 pid_params.i_gain_pct = policy->i_gain_pct;
848 pid_params.d_gain_pct = policy->d_gain_pct;
849 pid_params.deadband = policy->deadband;
850 pid_params.setpoint = policy->setpoint;
853 static void copy_cpu_funcs(struct pstate_funcs *funcs)
855 pstate_funcs.get_max = funcs->get_max;
856 pstate_funcs.get_min = funcs->get_min;
857 pstate_funcs.get_turbo = funcs->get_turbo;
858 pstate_funcs.set = funcs->set;
859 pstate_funcs.get_vid = funcs->get_vid;
862 #if IS_ENABLED(CONFIG_ACPI)
863 #include <acpi/processor.h>
865 static bool intel_pstate_no_acpi_pss(void)
869 for_each_possible_cpu(i) {
871 union acpi_object *pss;
872 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
873 struct acpi_processor *pr = per_cpu(processors, i);
878 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
879 if (ACPI_FAILURE(status))
882 pss = buffer.pointer;
883 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
894 struct hw_vendor_info {
896 char oem_id[ACPI_OEM_ID_SIZE];
897 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
900 /* Hardware vendor-specific info that has its own power management modes */
901 static struct hw_vendor_info vendor_info[] = {
902 {1, "HP ", "ProLiant"},
906 static bool intel_pstate_platform_pwr_mgmt_exists(void)
908 struct acpi_table_header hdr;
909 struct hw_vendor_info *v_info;
912 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
915 for (v_info = vendor_info; v_info->valid; v_info++) {
916 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
917 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
918 && intel_pstate_no_acpi_pss())
924 #else /* CONFIG_ACPI not enabled */
925 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
926 #endif /* CONFIG_ACPI */
928 static int __init intel_pstate_init(void)
931 const struct x86_cpu_id *id;
932 struct cpu_defaults *cpu_info;
937 id = x86_match_cpu(intel_pstate_cpu_ids);
942 * The Intel pstate driver will be ignored if the platform
943 * firmware has its own power management modes.
945 if (intel_pstate_platform_pwr_mgmt_exists())
948 cpu_info = (struct cpu_defaults *)id->driver_data;
950 copy_pid_params(&cpu_info->pid_policy);
951 copy_cpu_funcs(&cpu_info->funcs);
953 if (intel_pstate_msrs_not_valid())
956 pr_info("Intel P-state driver initializing.\n");
958 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
962 rc = cpufreq_register_driver(&intel_pstate_driver);
966 intel_pstate_debug_expose_params();
967 intel_pstate_sysfs_expose_params();
972 for_each_online_cpu(cpu) {
973 if (all_cpu_data[cpu]) {
974 del_timer_sync(&all_cpu_data[cpu]->timer);
975 kfree(all_cpu_data[cpu]);
983 device_initcall(intel_pstate_init);
985 static int __init intel_pstate_setup(char *str)
990 if (!strcmp(str, "disable"))
994 early_param("intel_pstate", intel_pstate_setup);
996 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
997 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
998 MODULE_LICENSE("GPL");