2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define SAMPLE_COUNT 3
37 #define BYT_RATIOS 0x66a
38 #define BYT_VIDS 0x66b
39 #define BYT_TURBO_RATIOS 0x66c
43 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
44 #define fp_toint(X) ((X) >> FRAC_BITS)
45 #define FP_ROUNDUP(X) ((X) += 1 << FRAC_BITS)
47 static inline int32_t mul_fp(int32_t x, int32_t y)
49 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
52 static inline int32_t div_fp(int32_t x, int32_t y)
54 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
58 int32_t core_pct_busy;
61 unsigned long long tsc;
93 struct timer_list timer;
95 struct pstate_data pstate;
101 unsigned long long prev_tsc;
103 struct sample samples[SAMPLE_COUNT];
106 static struct cpudata **all_cpu_data;
107 struct pstate_adjust_policy {
116 struct pstate_funcs {
117 int (*get_max)(void);
118 int (*get_min)(void);
119 int (*get_turbo)(void);
120 void (*set)(struct cpudata*, int pstate);
121 void (*get_vid)(struct cpudata *);
124 struct cpu_defaults {
125 struct pstate_adjust_policy pid_policy;
126 struct pstate_funcs funcs;
129 static struct pstate_adjust_policy pid_params;
130 static struct pstate_funcs pstate_funcs;
142 static struct perf_limits limits = {
145 .max_perf = int_tofp(1),
148 .max_policy_pct = 100,
149 .max_sysfs_pct = 100,
152 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
153 int deadband, int integral) {
154 pid->setpoint = setpoint;
155 pid->deadband = deadband;
156 pid->integral = int_tofp(integral);
157 pid->last_err = setpoint - busy;
160 static inline void pid_p_gain_set(struct _pid *pid, int percent)
162 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
165 static inline void pid_i_gain_set(struct _pid *pid, int percent)
167 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
170 static inline void pid_d_gain_set(struct _pid *pid, int percent)
173 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
176 static signed int pid_calc(struct _pid *pid, int32_t busy)
179 int32_t pterm, dterm, fp_error;
180 int32_t integral_limit;
182 fp_error = int_tofp(pid->setpoint) - busy;
184 if (abs(fp_error) <= int_tofp(pid->deadband))
187 pterm = mul_fp(pid->p_gain, fp_error);
189 pid->integral += fp_error;
191 /* limit the integral term */
192 integral_limit = int_tofp(30);
193 if (pid->integral > integral_limit)
194 pid->integral = integral_limit;
195 if (pid->integral < -integral_limit)
196 pid->integral = -integral_limit;
198 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
199 pid->last_err = fp_error;
201 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
203 return (signed int)fp_toint(result);
206 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
208 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
209 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
210 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
219 static inline void intel_pstate_reset_all_pid(void)
222 for_each_online_cpu(cpu) {
223 if (all_cpu_data[cpu])
224 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
228 /************************** debugfs begin ************************/
229 static int pid_param_set(void *data, u64 val)
232 intel_pstate_reset_all_pid();
235 static int pid_param_get(void *data, u64 *val)
240 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
241 pid_param_set, "%llu\n");
248 static struct pid_param pid_files[] = {
249 {"sample_rate_ms", &pid_params.sample_rate_ms},
250 {"d_gain_pct", &pid_params.d_gain_pct},
251 {"i_gain_pct", &pid_params.i_gain_pct},
252 {"deadband", &pid_params.deadband},
253 {"setpoint", &pid_params.setpoint},
254 {"p_gain_pct", &pid_params.p_gain_pct},
258 static struct dentry *debugfs_parent;
259 static void intel_pstate_debug_expose_params(void)
263 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
264 if (IS_ERR_OR_NULL(debugfs_parent))
266 while (pid_files[i].name) {
267 debugfs_create_file(pid_files[i].name, 0660,
268 debugfs_parent, pid_files[i].value,
274 /************************** debugfs end ************************/
276 /************************** sysfs begin ************************/
277 #define show_one(file_name, object) \
278 static ssize_t show_##file_name \
279 (struct kobject *kobj, struct attribute *attr, char *buf) \
281 return sprintf(buf, "%u\n", limits.object); \
284 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
285 const char *buf, size_t count)
289 ret = sscanf(buf, "%u", &input);
292 limits.no_turbo = clamp_t(int, input, 0 , 1);
297 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
298 const char *buf, size_t count)
302 ret = sscanf(buf, "%u", &input);
306 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
307 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
308 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
312 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
313 const char *buf, size_t count)
317 ret = sscanf(buf, "%u", &input);
320 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
321 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
326 show_one(no_turbo, no_turbo);
327 show_one(max_perf_pct, max_perf_pct);
328 show_one(min_perf_pct, min_perf_pct);
330 define_one_global_rw(no_turbo);
331 define_one_global_rw(max_perf_pct);
332 define_one_global_rw(min_perf_pct);
334 static struct attribute *intel_pstate_attributes[] = {
341 static struct attribute_group intel_pstate_attr_group = {
342 .attrs = intel_pstate_attributes,
344 static struct kobject *intel_pstate_kobject;
346 static void intel_pstate_sysfs_expose_params(void)
350 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
351 &cpu_subsys.dev_root->kobj);
352 BUG_ON(!intel_pstate_kobject);
353 rc = sysfs_create_group(intel_pstate_kobject,
354 &intel_pstate_attr_group);
358 /************************** sysfs end ************************/
359 static int byt_get_min_pstate(void)
362 rdmsrl(BYT_RATIOS, value);
363 return (value >> 8) & 0xFF;
366 static int byt_get_max_pstate(void)
369 rdmsrl(BYT_RATIOS, value);
370 return (value >> 16) & 0xFF;
373 static int byt_get_turbo_pstate(void)
376 rdmsrl(BYT_TURBO_RATIOS, value);
380 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
390 vid_fp = cpudata->vid.min + mul_fp(
391 int_tofp(pstate - cpudata->pstate.min_pstate),
394 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
395 vid = fp_toint(vid_fp);
399 wrmsrl(MSR_IA32_PERF_CTL, val);
402 static void byt_get_vid(struct cpudata *cpudata)
406 rdmsrl(BYT_VIDS, value);
407 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
408 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
409 cpudata->vid.ratio = div_fp(
410 cpudata->vid.max - cpudata->vid.min,
411 int_tofp(cpudata->pstate.max_pstate -
412 cpudata->pstate.min_pstate));
416 static int core_get_min_pstate(void)
419 rdmsrl(MSR_PLATFORM_INFO, value);
420 return (value >> 40) & 0xFF;
423 static int core_get_max_pstate(void)
426 rdmsrl(MSR_PLATFORM_INFO, value);
427 return (value >> 8) & 0xFF;
430 static int core_get_turbo_pstate(void)
434 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
435 nont = core_get_max_pstate();
436 ret = ((value) & 255);
442 static void core_set_pstate(struct cpudata *cpudata, int pstate)
450 wrmsrl(MSR_IA32_PERF_CTL, val);
453 static struct cpu_defaults core_params = {
455 .sample_rate_ms = 10,
463 .get_max = core_get_max_pstate,
464 .get_min = core_get_min_pstate,
465 .get_turbo = core_get_turbo_pstate,
466 .set = core_set_pstate,
470 static struct cpu_defaults byt_params = {
472 .sample_rate_ms = 10,
480 .get_max = byt_get_max_pstate,
481 .get_min = byt_get_min_pstate,
482 .get_turbo = byt_get_turbo_pstate,
483 .set = byt_set_pstate,
484 .get_vid = byt_get_vid,
489 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
491 int max_perf = cpu->pstate.turbo_pstate;
495 max_perf = cpu->pstate.max_pstate;
497 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
498 *max = clamp_t(int, max_perf_adj,
499 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
501 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
502 *min = clamp_t(int, min_perf,
503 cpu->pstate.min_pstate, max_perf);
506 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
508 int max_perf, min_perf;
510 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
512 pstate = clamp_t(int, pstate, min_perf, max_perf);
514 if (pstate == cpu->pstate.current_pstate)
517 trace_cpu_frequency(pstate * 100000, cpu->cpu);
519 cpu->pstate.current_pstate = pstate;
521 pstate_funcs.set(cpu, pstate);
524 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
527 target = cpu->pstate.current_pstate + steps;
529 intel_pstate_set_pstate(cpu, target);
532 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
535 target = cpu->pstate.current_pstate - steps;
536 intel_pstate_set_pstate(cpu, target);
539 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
541 sprintf(cpu->name, "Intel 2nd generation core");
543 cpu->pstate.min_pstate = pstate_funcs.get_min();
544 cpu->pstate.max_pstate = pstate_funcs.get_max();
545 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
547 if (pstate_funcs.get_vid)
548 pstate_funcs.get_vid(cpu);
551 * goto max pstate so we don't slow up boot if we are built-in if we are
552 * a module we will take care of it during normal operation
554 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
557 static inline void intel_pstate_calc_busy(struct cpudata *cpu,
558 struct sample *sample)
563 core_pct = div_fp(int_tofp((sample->aperf)),
564 int_tofp((sample->mperf)));
565 core_pct = mul_fp(core_pct, int_tofp(100));
566 FP_ROUNDUP(core_pct);
568 c0_pct = div_fp(int_tofp(sample->mperf), int_tofp(sample->tsc));
570 sample->freq = fp_toint(
571 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
573 sample->core_pct_busy = mul_fp(core_pct, c0_pct);
576 static inline void intel_pstate_sample(struct cpudata *cpu)
579 unsigned long long tsc;
581 rdmsrl(MSR_IA32_APERF, aperf);
582 rdmsrl(MSR_IA32_MPERF, mperf);
583 tsc = native_read_tsc();
585 aperf = aperf >> FRAC_BITS;
586 mperf = mperf >> FRAC_BITS;
587 tsc = tsc >> FRAC_BITS;
589 cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
590 cpu->samples[cpu->sample_ptr].aperf = aperf;
591 cpu->samples[cpu->sample_ptr].mperf = mperf;
592 cpu->samples[cpu->sample_ptr].tsc = tsc;
593 cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
594 cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
595 cpu->samples[cpu->sample_ptr].tsc -= cpu->prev_tsc;
597 intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
599 cpu->prev_aperf = aperf;
600 cpu->prev_mperf = mperf;
604 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
606 int sample_time, delay;
608 sample_time = pid_params.sample_rate_ms;
609 delay = msecs_to_jiffies(sample_time);
610 mod_timer_pinned(&cpu->timer, jiffies + delay);
613 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
615 int32_t core_busy, max_pstate, current_pstate;
617 core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
618 max_pstate = int_tofp(cpu->pstate.max_pstate);
619 current_pstate = int_tofp(cpu->pstate.current_pstate);
620 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
621 return FP_ROUNDUP(core_busy);
624 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
632 busy_scaled = intel_pstate_get_scaled_busy(cpu);
634 ctl = pid_calc(pid, busy_scaled);
639 intel_pstate_pstate_increase(cpu, steps);
641 intel_pstate_pstate_decrease(cpu, steps);
644 static void intel_pstate_timer_func(unsigned long __data)
646 struct cpudata *cpu = (struct cpudata *) __data;
647 struct sample *sample;
649 intel_pstate_sample(cpu);
651 sample = &cpu->samples[cpu->sample_ptr];
653 intel_pstate_adjust_busy_pstate(cpu);
655 trace_pstate_sample(fp_toint(sample->core_pct_busy),
656 fp_toint(intel_pstate_get_scaled_busy(cpu)),
657 cpu->pstate.current_pstate,
662 intel_pstate_set_sample_time(cpu);
665 #define ICPU(model, policy) \
666 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
667 (unsigned long)&policy }
669 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
670 ICPU(0x2a, core_params),
671 ICPU(0x2d, core_params),
672 ICPU(0x37, byt_params),
673 ICPU(0x3a, core_params),
674 ICPU(0x3c, core_params),
675 ICPU(0x3e, core_params),
676 ICPU(0x3f, core_params),
677 ICPU(0x45, core_params),
678 ICPU(0x46, core_params),
681 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
683 static int intel_pstate_init_cpu(unsigned int cpunum)
686 const struct x86_cpu_id *id;
689 id = x86_match_cpu(intel_pstate_cpu_ids);
693 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
694 if (!all_cpu_data[cpunum])
697 cpu = all_cpu_data[cpunum];
699 intel_pstate_get_cpu_pstates(cpu);
700 if (!cpu->pstate.current_pstate) {
701 all_cpu_data[cpunum] = NULL;
708 init_timer_deferrable(&cpu->timer);
709 cpu->timer.function = intel_pstate_timer_func;
712 cpu->timer.expires = jiffies + HZ/100;
713 intel_pstate_busy_pid_reset(cpu);
714 intel_pstate_sample(cpu);
715 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
717 add_timer_on(&cpu->timer, cpunum);
719 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
724 static unsigned int intel_pstate_get(unsigned int cpu_num)
726 struct sample *sample;
729 cpu = all_cpu_data[cpu_num];
732 sample = &cpu->samples[cpu->sample_ptr];
736 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
740 cpu = all_cpu_data[policy->cpu];
742 if (!policy->cpuinfo.max_freq)
745 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
746 limits.min_perf_pct = 100;
747 limits.min_perf = int_tofp(1);
748 limits.max_perf_pct = 100;
749 limits.max_perf = int_tofp(1);
753 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
754 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
755 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
757 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
758 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
759 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
760 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
765 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
767 cpufreq_verify_within_cpu_limits(policy);
769 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
770 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
776 static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
778 int cpu = policy->cpu;
780 del_timer(&all_cpu_data[cpu]->timer);
781 kfree(all_cpu_data[cpu]);
782 all_cpu_data[cpu] = NULL;
786 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
791 rc = intel_pstate_init_cpu(policy->cpu);
795 cpu = all_cpu_data[policy->cpu];
797 if (!limits.no_turbo &&
798 limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
799 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
801 policy->policy = CPUFREQ_POLICY_POWERSAVE;
803 policy->min = cpu->pstate.min_pstate * 100000;
804 policy->max = cpu->pstate.turbo_pstate * 100000;
806 /* cpuinfo and default policy values */
807 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
808 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
809 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
810 cpumask_set_cpu(policy->cpu, policy->cpus);
815 static struct cpufreq_driver intel_pstate_driver = {
816 .flags = CPUFREQ_CONST_LOOPS,
817 .verify = intel_pstate_verify_policy,
818 .setpolicy = intel_pstate_set_policy,
819 .get = intel_pstate_get,
820 .init = intel_pstate_cpu_init,
821 .exit = intel_pstate_cpu_exit,
822 .name = "intel_pstate",
825 static int __initdata no_load;
827 static int intel_pstate_msrs_not_valid(void)
829 /* Check that all the msr's we are using are valid. */
830 u64 aperf, mperf, tmp;
832 rdmsrl(MSR_IA32_APERF, aperf);
833 rdmsrl(MSR_IA32_MPERF, mperf);
835 if (!pstate_funcs.get_max() ||
836 !pstate_funcs.get_min() ||
837 !pstate_funcs.get_turbo())
840 rdmsrl(MSR_IA32_APERF, tmp);
844 rdmsrl(MSR_IA32_MPERF, tmp);
851 static void copy_pid_params(struct pstate_adjust_policy *policy)
853 pid_params.sample_rate_ms = policy->sample_rate_ms;
854 pid_params.p_gain_pct = policy->p_gain_pct;
855 pid_params.i_gain_pct = policy->i_gain_pct;
856 pid_params.d_gain_pct = policy->d_gain_pct;
857 pid_params.deadband = policy->deadband;
858 pid_params.setpoint = policy->setpoint;
861 static void copy_cpu_funcs(struct pstate_funcs *funcs)
863 pstate_funcs.get_max = funcs->get_max;
864 pstate_funcs.get_min = funcs->get_min;
865 pstate_funcs.get_turbo = funcs->get_turbo;
866 pstate_funcs.set = funcs->set;
867 pstate_funcs.get_vid = funcs->get_vid;
870 #if IS_ENABLED(CONFIG_ACPI)
871 #include <acpi/processor.h>
873 static bool intel_pstate_no_acpi_pss(void)
877 for_each_possible_cpu(i) {
879 union acpi_object *pss;
880 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
881 struct acpi_processor *pr = per_cpu(processors, i);
886 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
887 if (ACPI_FAILURE(status))
890 pss = buffer.pointer;
891 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
902 struct hw_vendor_info {
904 char oem_id[ACPI_OEM_ID_SIZE];
905 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
908 /* Hardware vendor-specific info that has its own power management modes */
909 static struct hw_vendor_info vendor_info[] = {
910 {1, "HP ", "ProLiant"},
914 static bool intel_pstate_platform_pwr_mgmt_exists(void)
916 struct acpi_table_header hdr;
917 struct hw_vendor_info *v_info;
920 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
923 for (v_info = vendor_info; v_info->valid; v_info++) {
924 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
925 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
926 && intel_pstate_no_acpi_pss())
932 #else /* CONFIG_ACPI not enabled */
933 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
934 #endif /* CONFIG_ACPI */
936 static int __init intel_pstate_init(void)
939 const struct x86_cpu_id *id;
940 struct cpu_defaults *cpu_info;
945 id = x86_match_cpu(intel_pstate_cpu_ids);
950 * The Intel pstate driver will be ignored if the platform
951 * firmware has its own power management modes.
953 if (intel_pstate_platform_pwr_mgmt_exists())
956 cpu_info = (struct cpu_defaults *)id->driver_data;
958 copy_pid_params(&cpu_info->pid_policy);
959 copy_cpu_funcs(&cpu_info->funcs);
961 if (intel_pstate_msrs_not_valid())
964 pr_info("Intel P-state driver initializing.\n");
966 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
970 rc = cpufreq_register_driver(&intel_pstate_driver);
974 intel_pstate_debug_expose_params();
975 intel_pstate_sysfs_expose_params();
980 for_each_online_cpu(cpu) {
981 if (all_cpu_data[cpu]) {
982 del_timer_sync(&all_cpu_data[cpu]->timer);
983 kfree(all_cpu_data[cpu]);
991 device_initcall(intel_pstate_init);
993 static int __init intel_pstate_setup(char *str)
998 if (!strcmp(str, "disable"))
1002 early_param("intel_pstate", intel_pstate_setup);
1004 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1005 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1006 MODULE_LICENSE("GPL");