1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11 select ARCH_HAS_UBSAN_SANITIZE_ALL
12 select ARCH_HAS_GCOV_PROFILE_ALL
13 select ARCH_KEEP_MEMBLOCK if DEBUG_KERNEL
14 select ARCH_SUPPORTS_UPROBES
15 select ARCH_USE_BUILTIN_BSWAP
16 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
17 select ARCH_USE_QUEUED_RWLOCKS
18 select ARCH_USE_QUEUED_SPINLOCKS
19 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
20 select ARCH_WANT_IPC_PARSE_VERSION
21 select ARCH_WANT_LD_ORPHAN_WARN
22 select BUILDTIME_TABLE_SORT
23 select CLONE_BACKWARDS
24 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
25 select CPU_PM if CPU_IDLE
26 select GENERIC_ATOMIC64 if !64BIT
27 select GENERIC_CMOS_UPDATE
28 select GENERIC_CPU_AUTOPROBE
29 select GENERIC_GETTIMEOFDAY
31 select GENERIC_IRQ_PROBE
32 select GENERIC_IRQ_SHOW
33 select GENERIC_ISA_DMA if EISA
34 select GENERIC_LIB_ASHLDI3
35 select GENERIC_LIB_ASHRDI3
36 select GENERIC_LIB_CMPDI2
37 select GENERIC_LIB_LSHRDI3
38 select GENERIC_LIB_UCMPDI2
39 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
40 select GENERIC_SMP_IDLE_THREAD
41 select GENERIC_TIME_VSYSCALL
42 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
43 select HANDLE_DOMAIN_IRQ
44 select HAVE_ARCH_COMPILER_H
45 select HAVE_ARCH_JUMP_LABEL
46 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
47 select HAVE_ARCH_MMAP_RND_BITS if MMU
48 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
49 select HAVE_ARCH_SECCOMP_FILTER
50 select HAVE_ARCH_TRACEHOOK
51 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
52 select HAVE_ASM_MODVERSIONS
53 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
54 select HAVE_CONTEXT_TRACKING
56 select HAVE_C_RECORDMCOUNT
57 select HAVE_DEBUG_KMEMLEAK
58 select HAVE_DEBUG_STACKOVERFLOW
59 select HAVE_DMA_CONTIGUOUS
60 select HAVE_DYNAMIC_FTRACE
61 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
62 select HAVE_EXIT_THREAD
64 select HAVE_FTRACE_MCOUNT_RECORD
65 select HAVE_FUNCTION_GRAPH_TRACER
66 select HAVE_FUNCTION_TRACER
67 select HAVE_GCC_PLUGINS
68 select HAVE_GENERIC_VDSO
70 select HAVE_IOREMAP_PROT
71 select HAVE_IRQ_EXIT_ON_IRQ_STACK
72 select HAVE_IRQ_TIME_ACCOUNTING
74 select HAVE_KRETPROBES
75 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
76 select HAVE_MOD_ARCH_SPECIFIC
78 select HAVE_PERF_EVENTS
80 select HAVE_PERF_USER_STACK_DUMP
81 select HAVE_REGS_AND_STACK_ACCESS_API
83 select HAVE_SPARSE_SYSCALL_NR
84 select HAVE_STACKPROTECTOR
85 select HAVE_SYSCALL_TRACEPOINTS
86 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
87 select IRQ_FORCED_THREADING
89 select MODULES_USE_ELF_REL if MODULES
90 select MODULES_USE_ELF_RELA if MODULES && 64BIT
91 select PERF_USE_VMALLOC
92 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
95 select SYSCTL_EXCEPTION_TRACE
97 select ARCH_HAS_ELFCORE_COMPAT
99 config MIPS_FIXUP_BIGPHYS_ADDR
107 select SYS_SUPPORTS_32BIT_KERNEL
108 select SYS_SUPPORTS_LITTLE_ENDIAN
109 select SYS_SUPPORTS_ZBOOT
110 select DMA_NONCOHERENT
115 select GENERIC_IRQ_CHIP
116 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
118 select CPU_SUPPORTS_CPUFREQ
119 select MIPS_EXTERNAL_TIMER
121 menu "Machine selection"
125 default MIPS_GENERIC_KERNEL
127 config MIPS_GENERIC_KERNEL
128 bool "Generic board-agnostic MIPS kernel"
129 select ARCH_HAS_SETUP_DMA_OPS
134 select CLKSRC_MIPS_GIC
136 select CPU_MIPSR2_IRQ_EI
137 select CPU_MIPSR2_IRQ_VI
139 select DMA_NONCOHERENT
142 select MIPS_AUTO_PFN_OFFSET
143 select MIPS_CPU_SCACHE
145 select MIPS_L1_CACHE_SHIFT_7
146 select NO_EXCEPT_FILL
147 select PCI_DRIVERS_GENERIC
150 select SYS_HAS_CPU_MIPS32_R1
151 select SYS_HAS_CPU_MIPS32_R2
152 select SYS_HAS_CPU_MIPS32_R6
153 select SYS_HAS_CPU_MIPS64_R1
154 select SYS_HAS_CPU_MIPS64_R2
155 select SYS_HAS_CPU_MIPS64_R6
156 select SYS_SUPPORTS_32BIT_KERNEL
157 select SYS_SUPPORTS_64BIT_KERNEL
158 select SYS_SUPPORTS_BIG_ENDIAN
159 select SYS_SUPPORTS_HIGHMEM
160 select SYS_SUPPORTS_LITTLE_ENDIAN
161 select SYS_SUPPORTS_MICROMIPS
162 select SYS_SUPPORTS_MIPS16
163 select SYS_SUPPORTS_MIPS_CPS
164 select SYS_SUPPORTS_MULTITHREADING
165 select SYS_SUPPORTS_RELOCATABLE
166 select SYS_SUPPORTS_SMARTMIPS
167 select SYS_SUPPORTS_ZBOOT
169 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
170 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
171 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
172 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
173 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177 Select this to build a kernel which aims to support multiple boards,
178 generally using a flattened device tree passed from the bootloader
179 using the boot protocol defined in the UHI (Unified Hosting
180 Interface) specification.
183 bool "Alchemy processor based machines"
184 select PHYS_ADDR_T_64BIT
188 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
189 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
190 select SYS_HAS_CPU_MIPS32_R1
191 select SYS_SUPPORTS_32BIT_KERNEL
192 select SYS_SUPPORTS_APM_EMULATION
194 select SYS_SUPPORTS_ZBOOT
198 bool "Texas Instruments AR7"
200 select DMA_NONCOHERENT
204 select NO_EXCEPT_FILL
206 select SYS_HAS_CPU_MIPS32_R1
207 select SYS_HAS_EARLY_PRINTK
208 select SYS_SUPPORTS_32BIT_KERNEL
209 select SYS_SUPPORTS_LITTLE_ENDIAN
210 select SYS_SUPPORTS_MIPS16
211 select SYS_SUPPORTS_ZBOOT_UART16550
214 select HAVE_LEGACY_CLK
216 Support for the Texas Instruments AR7 System-on-a-Chip
217 family: TNETD7100, 7200 and 7300.
220 bool "Atheros AR231x/AR531x SoC support"
223 select DMA_NONCOHERENT
226 select SYS_HAS_CPU_MIPS32_R1
227 select SYS_SUPPORTS_BIG_ENDIAN
228 select SYS_SUPPORTS_32BIT_KERNEL
229 select SYS_HAS_EARLY_PRINTK
231 Support for Atheros AR231x and Atheros AR531x based boards
234 bool "Atheros AR71XX/AR724X/AR913X based boards"
235 select ARCH_HAS_RESET_CONTROLLER
239 select DMA_NONCOHERENT
244 select SYS_HAS_CPU_MIPS32_R2
245 select SYS_HAS_EARLY_PRINTK
246 select SYS_SUPPORTS_32BIT_KERNEL
247 select SYS_SUPPORTS_BIG_ENDIAN
248 select SYS_SUPPORTS_MIPS16
249 select SYS_SUPPORTS_ZBOOT_UART_PROM
251 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
253 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
256 bool "Broadcom Generic BMIPS kernel"
257 select ARCH_HAS_RESET_CONTROLLER
258 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
259 select ARCH_HAS_PHYS_TO_DMA
261 select NO_EXCEPT_FILL
267 select BCM6345_L1_IRQ
268 select BCM7038_L1_IRQ
269 select BCM7120_L2_IRQ
270 select BRCMSTB_L2_IRQ
272 select DMA_NONCOHERENT
273 select SYS_SUPPORTS_32BIT_KERNEL
274 select SYS_SUPPORTS_LITTLE_ENDIAN
275 select SYS_SUPPORTS_BIG_ENDIAN
276 select SYS_SUPPORTS_HIGHMEM
277 select SYS_HAS_CPU_BMIPS32_3300
278 select SYS_HAS_CPU_BMIPS4350
279 select SYS_HAS_CPU_BMIPS4380
280 select SYS_HAS_CPU_BMIPS5000
282 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
283 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
284 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
285 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
286 select HARDIRQS_SW_RESEND
288 Build a generic DT-based kernel image that boots on select
289 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
290 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
291 must be set appropriately for your board.
294 bool "Broadcom BCM47XX based boards"
298 select DMA_NONCOHERENT
301 select SYS_HAS_CPU_MIPS32_R1
302 select NO_EXCEPT_FILL
303 select SYS_SUPPORTS_32BIT_KERNEL
304 select SYS_SUPPORTS_LITTLE_ENDIAN
305 select SYS_SUPPORTS_MIPS16
306 select SYS_SUPPORTS_ZBOOT
307 select SYS_HAS_EARLY_PRINTK
308 select USE_GENERIC_EARLY_PRINTK_8250
310 select LEDS_GPIO_REGISTER
313 select BCM47XX_SSB if !BCM47XX_BCMA
315 Support for BCM47XX based boards
318 bool "Broadcom BCM63XX based boards"
323 select DMA_NONCOHERENT
325 select SYS_SUPPORTS_32BIT_KERNEL
326 select SYS_SUPPORTS_BIG_ENDIAN
327 select SYS_HAS_EARLY_PRINTK
330 select MIPS_L1_CACHE_SHIFT_4
332 select HAVE_LEGACY_CLK
334 Support for BCM63XX based boards
341 select DMA_NONCOHERENT
347 select PCI_GT64XXX_PCI0
348 select SYS_HAS_CPU_NEVADA
349 select SYS_HAS_EARLY_PRINTK
350 select SYS_SUPPORTS_32BIT_KERNEL
351 select SYS_SUPPORTS_64BIT_KERNEL
352 select SYS_SUPPORTS_LITTLE_ENDIAN
353 select USE_GENERIC_EARLY_PRINTK_8250
355 config MACH_DECSTATION
359 select CEVT_R4K if CPU_R4X00
361 select CSRC_R4K if CPU_R4X00
362 select CPU_DADDI_WORKAROUNDS if 64BIT
363 select CPU_R4000_WORKAROUNDS if 64BIT
364 select CPU_R4400_WORKAROUNDS if 64BIT
365 select DMA_NONCOHERENT
368 select SYS_HAS_CPU_R3000
369 select SYS_HAS_CPU_R4X00
370 select SYS_SUPPORTS_32BIT_KERNEL
371 select SYS_SUPPORTS_64BIT_KERNEL
372 select SYS_SUPPORTS_LITTLE_ENDIAN
373 select SYS_SUPPORTS_128HZ
374 select SYS_SUPPORTS_256HZ
375 select SYS_SUPPORTS_1024HZ
376 select MIPS_L1_CACHE_SHIFT_4
378 This enables support for DEC's MIPS based workstations. For details
379 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
380 DECstation porting pages on <http://decstation.unix-ag.org/>.
382 If you have one of the following DECstation Models you definitely
383 want to choose R4xx0 for the CPU Type:
390 otherwise choose R3000.
393 bool "Jazz family of machines"
396 select ARCH_MIGHT_HAVE_PC_PARPORT
397 select ARCH_MIGHT_HAVE_PC_SERIO
401 select ARCH_MAY_HAVE_PC_FDC
404 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
405 select GENERIC_ISA_DMA
406 select HAVE_PCSPKR_PLATFORM
411 select SYS_HAS_CPU_R4X00
412 select SYS_SUPPORTS_32BIT_KERNEL
413 select SYS_SUPPORTS_64BIT_KERNEL
414 select SYS_SUPPORTS_100HZ
415 select SYS_SUPPORTS_LITTLE_ENDIAN
417 This a family of machines based on the MIPS R4030 chipset which was
418 used by several vendors to build RISC/os and Windows NT workstations.
419 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
420 Olivetti M700-10 workstations.
422 config MACH_INGENIC_SOC
423 bool "Ingenic SoC based machines"
426 select SYS_SUPPORTS_ZBOOT_UART16550
429 bool "Lantiq based platforms"
430 select DMA_NONCOHERENT
434 select SYS_HAS_CPU_MIPS32_R1
435 select SYS_HAS_CPU_MIPS32_R2
436 select SYS_SUPPORTS_BIG_ENDIAN
437 select SYS_SUPPORTS_32BIT_KERNEL
438 select SYS_SUPPORTS_MIPS16
439 select SYS_SUPPORTS_MULTITHREADING
440 select SYS_SUPPORTS_VPE_LOADER
441 select SYS_HAS_EARLY_PRINTK
446 select HAVE_LEGACY_CLK
449 select PINCTRL_LANTIQ
450 select ARCH_HAS_RESET_CONTROLLER
451 select RESET_CONTROLLER
453 config MACH_LOONGSON32
454 bool "Loongson 32-bit family of machines"
455 select SYS_SUPPORTS_ZBOOT
457 This enables support for the Loongson-1 family of machines.
459 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
460 the Institute of Computing Technology (ICT), Chinese Academy of
463 config MACH_LOONGSON2EF
464 bool "Loongson-2E/F family of machines"
465 select SYS_SUPPORTS_ZBOOT
467 This enables the support of early Loongson-2E/F family of machines.
469 config MACH_LOONGSON64
470 bool "Loongson 64-bit family of machines"
471 select ARCH_SPARSEMEM_ENABLE
472 select ARCH_MIGHT_HAVE_PC_PARPORT
473 select ARCH_MIGHT_HAVE_PC_SERIO
474 select GENERIC_ISA_DMA_SUPPORT_BROKEN
484 select NO_EXCEPT_FILL
485 select NR_CPUS_DEFAULT_64
486 select USE_GENERIC_EARLY_PRINTK_8250
487 select PCI_DRIVERS_GENERIC
488 select SYS_HAS_CPU_LOONGSON64
489 select SYS_HAS_EARLY_PRINTK
490 select SYS_SUPPORTS_SMP
491 select SYS_SUPPORTS_HOTPLUG_CPU
492 select SYS_SUPPORTS_NUMA
493 select SYS_SUPPORTS_64BIT_KERNEL
494 select SYS_SUPPORTS_HIGHMEM
495 select SYS_SUPPORTS_LITTLE_ENDIAN
496 select SYS_SUPPORTS_ZBOOT
497 select SYS_SUPPORTS_RELOCATABLE
502 select PCI_HOST_GENERIC
504 This enables the support of Loongson-2/3 family of machines.
506 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
507 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
508 and Loongson-2F which will be removed), developed by the Institute
509 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
511 config MACH_PISTACHIO
512 bool "IMG Pistachio SoC based boards"
516 select CLKSRC_MIPS_GIC
519 select DMA_NONCOHERENT
523 select MIPS_CPU_SCACHE
527 select SYS_HAS_CPU_MIPS32_R2
528 select SYS_SUPPORTS_32BIT_KERNEL
529 select SYS_SUPPORTS_LITTLE_ENDIAN
530 select SYS_SUPPORTS_MIPS_CPS
531 select SYS_SUPPORTS_MULTITHREADING
532 select SYS_SUPPORTS_RELOCATABLE
533 select SYS_SUPPORTS_ZBOOT
534 select SYS_HAS_EARLY_PRINTK
535 select USE_GENERIC_EARLY_PRINTK_8250
538 This enables support for the IMG Pistachio SoC platform.
541 bool "MIPS Malta board"
542 select ARCH_MAY_HAVE_PC_FDC
543 select ARCH_MIGHT_HAVE_PC_PARPORT
544 select ARCH_MIGHT_HAVE_PC_SERIO
549 select CLKSRC_MIPS_GIC
552 select DMA_NONCOHERENT
553 select GENERIC_ISA_DMA
554 select HAVE_PCSPKR_PLATFORM
560 select MIPS_CPU_SCACHE
562 select MIPS_L1_CACHE_SHIFT_6
564 select PCI_GT64XXX_PCI0
567 select SYS_HAS_CPU_MIPS32_R1
568 select SYS_HAS_CPU_MIPS32_R2
569 select SYS_HAS_CPU_MIPS32_R3_5
570 select SYS_HAS_CPU_MIPS32_R5
571 select SYS_HAS_CPU_MIPS32_R6
572 select SYS_HAS_CPU_MIPS64_R1
573 select SYS_HAS_CPU_MIPS64_R2
574 select SYS_HAS_CPU_MIPS64_R6
575 select SYS_HAS_CPU_NEVADA
576 select SYS_HAS_CPU_RM7000
577 select SYS_SUPPORTS_32BIT_KERNEL
578 select SYS_SUPPORTS_64BIT_KERNEL
579 select SYS_SUPPORTS_BIG_ENDIAN
580 select SYS_SUPPORTS_HIGHMEM
581 select SYS_SUPPORTS_LITTLE_ENDIAN
582 select SYS_SUPPORTS_MICROMIPS
583 select SYS_SUPPORTS_MIPS16
584 select SYS_SUPPORTS_MIPS_CMP
585 select SYS_SUPPORTS_MIPS_CPS
586 select SYS_SUPPORTS_MULTITHREADING
587 select SYS_SUPPORTS_RELOCATABLE
588 select SYS_SUPPORTS_SMARTMIPS
589 select SYS_SUPPORTS_VPE_LOADER
590 select SYS_SUPPORTS_ZBOOT
592 select WAR_ICACHE_REFILLS
593 select ZONE_DMA32 if 64BIT
595 This enables support for the MIPS Technologies Malta evaluation
599 bool "Microchip PIC32 Family"
601 This enables support for the Microchip PIC32 family of platforms.
603 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
607 bool "NEC VR4100 series based machines"
610 select SYS_HAS_CPU_VR41XX
611 select SYS_SUPPORTS_MIPS16
614 config MACH_NINTENDO64
615 bool "Nintendo 64 console"
618 select SYS_HAS_CPU_R4300
619 select SYS_SUPPORTS_BIG_ENDIAN
620 select SYS_SUPPORTS_ZBOOT
621 select SYS_SUPPORTS_32BIT_KERNEL
622 select SYS_SUPPORTS_64BIT_KERNEL
623 select DMA_NONCOHERENT
627 bool "Ralink based machines"
631 select DMA_NONCOHERENT
634 select SYS_HAS_CPU_MIPS32_R1
635 select SYS_HAS_CPU_MIPS32_R2
636 select SYS_SUPPORTS_32BIT_KERNEL
637 select SYS_SUPPORTS_LITTLE_ENDIAN
638 select SYS_SUPPORTS_MIPS16
639 select SYS_SUPPORTS_ZBOOT
640 select SYS_HAS_EARLY_PRINTK
642 select ARCH_HAS_RESET_CONTROLLER
643 select RESET_CONTROLLER
645 config MACH_REALTEK_RTL
646 bool "Realtek RTL838x/RTL839x based machines"
648 select DMA_NONCOHERENT
652 select SYS_HAS_CPU_MIPS32_R1
653 select SYS_HAS_CPU_MIPS32_R2
654 select SYS_SUPPORTS_BIG_ENDIAN
655 select SYS_SUPPORTS_32BIT_KERNEL
656 select SYS_SUPPORTS_MIPS16
657 select SYS_SUPPORTS_MULTITHREADING
658 select SYS_SUPPORTS_VPE_LOADER
659 select SYS_HAS_EARLY_PRINTK
660 select SYS_HAS_EARLY_PRINTK_8250
661 select USE_GENERIC_EARLY_PRINTK_8250
667 bool "SGI IP22 (Indy/Indigo2)"
672 select ARCH_MIGHT_HAVE_PC_SERIO
676 select DEFAULT_SGI_PARTITION
677 select DMA_NONCOHERENT
681 select IP22_CPU_SCACHE
683 select GENERIC_ISA_DMA_SUPPORT_BROKEN
685 select SGI_HAS_INDYDOG
691 select SYS_HAS_CPU_R4X00
692 select SYS_HAS_CPU_R5000
693 select SYS_HAS_EARLY_PRINTK
694 select SYS_SUPPORTS_32BIT_KERNEL
695 select SYS_SUPPORTS_64BIT_KERNEL
696 select SYS_SUPPORTS_BIG_ENDIAN
697 select WAR_R4600_V1_INDEX_ICACHEOP
698 select WAR_R4600_V1_HIT_CACHEOP
699 select WAR_R4600_V2_HIT_CACHEOP
700 select MIPS_L1_CACHE_SHIFT_7
702 This are the SGI Indy, Challenge S and Indigo2, as well as certain
703 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
704 that runs on these, say Y here.
707 bool "SGI IP27 (Origin200/2000)"
708 select ARCH_HAS_PHYS_TO_DMA
709 select ARCH_SPARSEMEM_ENABLE
712 select ARC_CMDLINE_ONLY
714 select DEFAULT_SGI_PARTITION
715 select SYS_HAS_EARLY_PRINTK
718 select IRQ_DOMAIN_HIERARCHY
719 select NR_CPUS_DEFAULT_64
720 select PCI_DRIVERS_GENERIC
721 select PCI_XTALK_BRIDGE
722 select SYS_HAS_CPU_R10000
723 select SYS_SUPPORTS_64BIT_KERNEL
724 select SYS_SUPPORTS_BIG_ENDIAN
725 select SYS_SUPPORTS_NUMA
726 select SYS_SUPPORTS_SMP
727 select WAR_R10000_LLSC
728 select MIPS_L1_CACHE_SHIFT_7
731 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
732 workstations. To compile a Linux kernel that runs on these, say Y
736 bool "SGI IP28 (Indigo2 R10k)"
741 select ARCH_MIGHT_HAVE_PC_SERIO
745 select DEFAULT_SGI_PARTITION
746 select DMA_NONCOHERENT
747 select GENERIC_ISA_DMA_SUPPORT_BROKEN
753 select SGI_HAS_INDYDOG
759 select SYS_HAS_CPU_R10000
760 select SYS_HAS_EARLY_PRINTK
761 select SYS_SUPPORTS_64BIT_KERNEL
762 select SYS_SUPPORTS_BIG_ENDIAN
763 select WAR_R10000_LLSC
764 select MIPS_L1_CACHE_SHIFT_7
766 This is the SGI Indigo2 with R10000 processor. To compile a Linux
767 kernel that runs on these, say Y here.
770 bool "SGI IP30 (Octane/Octane2)"
771 select ARCH_HAS_PHYS_TO_DMA
777 select SYNC_R4K if SMP
781 select IRQ_DOMAIN_HIERARCHY
782 select NR_CPUS_DEFAULT_2
783 select PCI_DRIVERS_GENERIC
784 select PCI_XTALK_BRIDGE
785 select SYS_HAS_EARLY_PRINTK
786 select SYS_HAS_CPU_R10000
787 select SYS_SUPPORTS_64BIT_KERNEL
788 select SYS_SUPPORTS_BIG_ENDIAN
789 select SYS_SUPPORTS_SMP
790 select WAR_R10000_LLSC
791 select MIPS_L1_CACHE_SHIFT_7
794 These are the SGI Octane and Octane2 graphics workstations. To
795 compile a Linux kernel that runs on these, say Y here.
801 select ARCH_HAS_PHYS_TO_DMA
807 select DMA_NONCOHERENT
810 select R5000_CPU_SCACHE
811 select RM7000_CPU_SCACHE
812 select SYS_HAS_CPU_R5000
813 select SYS_HAS_CPU_R10000 if BROKEN
814 select SYS_HAS_CPU_RM7000
815 select SYS_HAS_CPU_NEVADA
816 select SYS_SUPPORTS_64BIT_KERNEL
817 select SYS_SUPPORTS_BIG_ENDIAN
818 select WAR_ICACHE_REFILLS
820 If you want this kernel to run on SGI O2 workstation, say Y here.
823 bool "Sibyte BCM91120C-CRhine"
825 select SIBYTE_BCM1120
827 select SYS_HAS_CPU_SB1
828 select SYS_SUPPORTS_BIG_ENDIAN
829 select SYS_SUPPORTS_LITTLE_ENDIAN
832 bool "Sibyte BCM91120x-Carmel"
834 select SIBYTE_BCM1120
836 select SYS_HAS_CPU_SB1
837 select SYS_SUPPORTS_BIG_ENDIAN
838 select SYS_SUPPORTS_LITTLE_ENDIAN
841 bool "Sibyte BCM91125C-CRhone"
843 select SIBYTE_BCM1125
845 select SYS_HAS_CPU_SB1
846 select SYS_SUPPORTS_BIG_ENDIAN
847 select SYS_SUPPORTS_HIGHMEM
848 select SYS_SUPPORTS_LITTLE_ENDIAN
851 bool "Sibyte BCM91125E-Rhone"
853 select SIBYTE_BCM1125H
855 select SYS_HAS_CPU_SB1
856 select SYS_SUPPORTS_BIG_ENDIAN
857 select SYS_SUPPORTS_LITTLE_ENDIAN
860 bool "Sibyte BCM91250A-SWARM"
862 select HAVE_PATA_PLATFORM
865 select SYS_HAS_CPU_SB1
866 select SYS_SUPPORTS_BIG_ENDIAN
867 select SYS_SUPPORTS_HIGHMEM
868 select SYS_SUPPORTS_LITTLE_ENDIAN
869 select ZONE_DMA32 if 64BIT
870 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
872 config SIBYTE_LITTLESUR
873 bool "Sibyte BCM91250C2-LittleSur"
875 select HAVE_PATA_PLATFORM
878 select SYS_HAS_CPU_SB1
879 select SYS_SUPPORTS_BIG_ENDIAN
880 select SYS_SUPPORTS_HIGHMEM
881 select SYS_SUPPORTS_LITTLE_ENDIAN
882 select ZONE_DMA32 if 64BIT
884 config SIBYTE_SENTOSA
885 bool "Sibyte BCM91250E-Sentosa"
889 select SYS_HAS_CPU_SB1
890 select SYS_SUPPORTS_BIG_ENDIAN
891 select SYS_SUPPORTS_LITTLE_ENDIAN
892 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
895 bool "Sibyte BCM91480B-BigSur"
897 select NR_CPUS_DEFAULT_4
898 select SIBYTE_BCM1x80
900 select SYS_HAS_CPU_SB1
901 select SYS_SUPPORTS_BIG_ENDIAN
902 select SYS_SUPPORTS_HIGHMEM
903 select SYS_SUPPORTS_LITTLE_ENDIAN
904 select ZONE_DMA32 if 64BIT
905 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
908 bool "SNI RM200/300/400"
911 select FW_ARC if CPU_LITTLE_ENDIAN
912 select FW_ARC32 if CPU_LITTLE_ENDIAN
913 select FW_SNIPROM if CPU_BIG_ENDIAN
914 select ARCH_MAY_HAVE_PC_FDC
915 select ARCH_MIGHT_HAVE_PC_PARPORT
916 select ARCH_MIGHT_HAVE_PC_SERIO
920 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
921 select DMA_NONCOHERENT
922 select GENERIC_ISA_DMA
924 select HAVE_PCSPKR_PLATFORM
930 select MIPS_L1_CACHE_SHIFT_6
931 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
932 select SYS_HAS_CPU_R4X00
933 select SYS_HAS_CPU_R5000
934 select SYS_HAS_CPU_R10000
935 select R5000_CPU_SCACHE
936 select SYS_HAS_EARLY_PRINTK
937 select SYS_SUPPORTS_32BIT_KERNEL
938 select SYS_SUPPORTS_64BIT_KERNEL
939 select SYS_SUPPORTS_BIG_ENDIAN
940 select SYS_SUPPORTS_HIGHMEM
941 select SYS_SUPPORTS_LITTLE_ENDIAN
942 select WAR_R4600_V2_HIT_CACHEOP
944 The SNI RM200/300/400 are MIPS-based machines manufactured by
945 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
946 Technology and now in turn merged with Fujitsu. Say Y here to
947 support this machine type.
950 bool "Toshiba TX39 series based machines"
953 bool "Toshiba TX49 series based machines"
954 select WAR_TX49XX_ICACHE_INDEX_INV
956 config MIKROTIK_RB532
957 bool "Mikrotik RB532 boards"
960 select DMA_NONCOHERENT
963 select SYS_HAS_CPU_MIPS32_R1
964 select SYS_SUPPORTS_32BIT_KERNEL
965 select SYS_SUPPORTS_LITTLE_ENDIAN
969 select MIPS_L1_CACHE_SHIFT_4
971 Support the Mikrotik(tm) RouterBoard 532 series,
972 based on the IDT RC32434 SoC.
974 config CAVIUM_OCTEON_SOC
975 bool "Cavium Networks Octeon SoC based boards"
977 select ARCH_HAS_PHYS_TO_DMA
979 select PHYS_ADDR_T_64BIT
980 select SYS_SUPPORTS_64BIT_KERNEL
981 select SYS_SUPPORTS_BIG_ENDIAN
983 select EDAC_ATOMIC_SCRUB
984 select SYS_SUPPORTS_LITTLE_ENDIAN
985 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
986 select SYS_HAS_EARLY_PRINTK
987 select SYS_HAS_CPU_CAVIUM_OCTEON
989 select HAVE_PLAT_DELAY
990 select HAVE_PLAT_FW_INIT_CMDLINE
991 select HAVE_PLAT_MEMCPY
996 select ARCH_SPARSEMEM_ENABLE
997 select SYS_SUPPORTS_SMP
998 select NR_CPUS_DEFAULT_64
999 select MIPS_NR_CPU_NR_MAP_1024
1001 select MTD_COMPLEX_MAPPINGS
1003 select SYS_SUPPORTS_RELOCATABLE
1005 This option supports all of the Octeon reference boards from Cavium
1006 Networks. It builds a kernel that dynamically determines the Octeon
1007 CPU type and supports all known board reference implementations.
1008 Some of the supported boards are:
1015 Say Y here for most Octeon reference boards.
1017 config NLM_XLR_BOARD
1018 bool "Netlogic XLR/XLS based systems"
1021 select SYS_HAS_CPU_XLR
1022 select SYS_SUPPORTS_SMP
1024 select SWAP_IO_SPACE
1025 select SYS_SUPPORTS_32BIT_KERNEL
1026 select SYS_SUPPORTS_64BIT_KERNEL
1027 select PHYS_ADDR_T_64BIT
1028 select SYS_SUPPORTS_BIG_ENDIAN
1029 select SYS_SUPPORTS_HIGHMEM
1030 select NR_CPUS_DEFAULT_32
1034 select ZONE_DMA32 if 64BIT
1036 select SYS_HAS_EARLY_PRINTK
1037 select SYS_SUPPORTS_ZBOOT
1038 select SYS_SUPPORTS_ZBOOT_UART16550
1040 Support for systems based on Netlogic XLR and XLS processors.
1041 Say Y here if you have a XLR or XLS based board.
1043 config NLM_XLP_BOARD
1044 bool "Netlogic XLP based systems"
1047 select SYS_HAS_CPU_XLP
1048 select SYS_SUPPORTS_SMP
1050 select SYS_SUPPORTS_32BIT_KERNEL
1051 select SYS_SUPPORTS_64BIT_KERNEL
1052 select PHYS_ADDR_T_64BIT
1054 select SYS_SUPPORTS_BIG_ENDIAN
1055 select SYS_SUPPORTS_LITTLE_ENDIAN
1056 select SYS_SUPPORTS_HIGHMEM
1057 select NR_CPUS_DEFAULT_32
1061 select ZONE_DMA32 if 64BIT
1063 select SYS_HAS_EARLY_PRINTK
1065 select SYS_SUPPORTS_ZBOOT
1066 select SYS_SUPPORTS_ZBOOT_UART16550
1068 This board is based on Netlogic XLP Processor.
1069 Say Y here if you have a XLP based board.
1073 source "arch/mips/alchemy/Kconfig"
1074 source "arch/mips/ath25/Kconfig"
1075 source "arch/mips/ath79/Kconfig"
1076 source "arch/mips/bcm47xx/Kconfig"
1077 source "arch/mips/bcm63xx/Kconfig"
1078 source "arch/mips/bmips/Kconfig"
1079 source "arch/mips/generic/Kconfig"
1080 source "arch/mips/ingenic/Kconfig"
1081 source "arch/mips/jazz/Kconfig"
1082 source "arch/mips/lantiq/Kconfig"
1083 source "arch/mips/pic32/Kconfig"
1084 source "arch/mips/pistachio/Kconfig"
1085 source "arch/mips/ralink/Kconfig"
1086 source "arch/mips/sgi-ip27/Kconfig"
1087 source "arch/mips/sibyte/Kconfig"
1088 source "arch/mips/txx9/Kconfig"
1089 source "arch/mips/vr41xx/Kconfig"
1090 source "arch/mips/cavium-octeon/Kconfig"
1091 source "arch/mips/loongson2ef/Kconfig"
1092 source "arch/mips/loongson32/Kconfig"
1093 source "arch/mips/loongson64/Kconfig"
1094 source "arch/mips/netlogic/Kconfig"
1098 config GENERIC_HWEIGHT
1102 config GENERIC_CALIBRATE_DELAY
1106 config SCHED_OMIT_FRAME_POINTER
1111 # Select some configuration options automatically based on user selections.
1116 config ARCH_MAY_HAVE_PC_FDC
1147 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1153 config MIPS_CLOCK_VSYSCALL
1154 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1163 config ARCH_SUPPORTS_UPROBES
1166 config DMA_PERDEV_COHERENT
1168 select ARCH_HAS_SETUP_DMA_OPS
1169 select DMA_NONCOHERENT
1171 config DMA_NONCOHERENT
1174 # MIPS allows mixing "slightly different" Cacheability and Coherency
1175 # Attribute bits. It is believed that the uncached access through
1176 # KSEG1 and the implementation specific "uncached accelerated" used
1177 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1178 # significant advantages.
1180 select ARCH_HAS_DMA_WRITE_COMBINE
1181 select ARCH_HAS_DMA_PREP_COHERENT
1182 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1183 select ARCH_HAS_DMA_SET_UNCACHED
1184 select DMA_NONCOHERENT_MMAP
1185 select NEED_DMA_MAP_STATE
1187 config SYS_HAS_EARLY_PRINTK
1190 config SYS_SUPPORTS_HOTPLUG_CPU
1193 config MIPS_BONITO64
1202 config NO_IOPORT_MAP
1206 def_bool CPU_NO_LOAD_STORE_LR
1208 config GENERIC_ISA_DMA
1210 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1213 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1215 select GENERIC_ISA_DMA
1217 config HAVE_PLAT_DELAY
1220 config HAVE_PLAT_FW_INIT_CMDLINE
1223 config HAVE_PLAT_MEMCPY
1229 config HOLES_IN_ZONE
1232 config SYS_SUPPORTS_RELOCATABLE
1235 Selected if the platform supports relocating the kernel.
1236 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1237 to allow access to command line and entropy sources.
1239 config MIPS_CBPF_JIT
1241 depends on BPF_JIT && HAVE_CBPF_JIT
1243 config MIPS_EBPF_JIT
1245 depends on BPF_JIT && HAVE_EBPF_JIT
1249 # Endianness selection. Sufficiently obscure so many users don't know what to
1250 # answer,so we try hard to limit the available choices. Also the use of a
1251 # choice statement should be more obvious to the user.
1254 prompt "Endianness selection"
1256 Some MIPS machines can be configured for either little or big endian
1257 byte order. These modes require different kernels and a different
1258 Linux distribution. In general there is one preferred byteorder for a
1259 particular system but some systems are just as commonly used in the
1260 one or the other endianness.
1262 config CPU_BIG_ENDIAN
1264 depends on SYS_SUPPORTS_BIG_ENDIAN
1266 config CPU_LITTLE_ENDIAN
1267 bool "Little endian"
1268 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1275 config SYS_SUPPORTS_APM_EMULATION
1278 config SYS_SUPPORTS_BIG_ENDIAN
1281 config SYS_SUPPORTS_LITTLE_ENDIAN
1284 config SYS_SUPPORTS_HUGETLBFS
1286 depends on CPU_SUPPORTS_HUGEPAGES
1289 config MIPS_HUGE_TLB_SUPPORT
1290 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1304 config PCI_GT64XXX_PCI0
1307 config PCI_XTALK_BRIDGE
1310 config NO_EXCEPT_FILL
1316 config SWAP_IO_SPACE
1319 config SGI_HAS_INDYDOG
1331 config SGI_HAS_ZILOG
1334 config SGI_HAS_I8042
1337 config DEFAULT_SGI_PARTITION
1349 config MIPS_L1_CACHE_SHIFT_4
1352 config MIPS_L1_CACHE_SHIFT_5
1355 config MIPS_L1_CACHE_SHIFT_6
1358 config MIPS_L1_CACHE_SHIFT_7
1361 config MIPS_L1_CACHE_SHIFT
1363 default "7" if MIPS_L1_CACHE_SHIFT_7
1364 default "6" if MIPS_L1_CACHE_SHIFT_6
1365 default "5" if MIPS_L1_CACHE_SHIFT_5
1366 default "4" if MIPS_L1_CACHE_SHIFT_4
1369 config ARC_CMDLINE_ONLY
1373 bool "ARC console support"
1374 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1388 menu "CPU selection"
1394 config CPU_LOONGSON64
1395 bool "Loongson 64-bit CPU"
1396 depends on SYS_HAS_CPU_LOONGSON64
1397 select ARCH_HAS_PHYS_TO_DMA
1399 select CPU_HAS_PREFETCH
1400 select CPU_SUPPORTS_64BIT_KERNEL
1401 select CPU_SUPPORTS_HIGHMEM
1402 select CPU_SUPPORTS_HUGEPAGES
1403 select CPU_SUPPORTS_MSA
1404 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1405 select CPU_MIPSR2_IRQ_VI
1406 select WEAK_ORDERING
1407 select WEAK_REORDERING_BEYOND_LLSC
1408 select MIPS_ASID_BITS_VARIABLE
1409 select MIPS_PGD_C0_CONTEXT
1410 select MIPS_L1_CACHE_SHIFT_6
1415 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1416 cores implements the MIPS64R2 instruction set with many extensions,
1417 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1418 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1419 Loongson-2E/2F is not covered here and will be removed in future.
1421 config LOONGSON3_ENHANCEMENT
1422 bool "New Loongson-3 CPU Enhancements"
1424 depends on CPU_LOONGSON64
1426 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1427 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1428 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1429 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1430 Fast TLB refill support, etc.
1432 This option enable those enhancements which are not probed at run
1433 time. If you want a generic kernel to run on all Loongson 3 machines,
1434 please say 'N' here. If you want a high-performance kernel to run on
1435 new Loongson-3 machines only, please say 'Y' here.
1437 config CPU_LOONGSON3_WORKAROUNDS
1438 bool "Old Loongson-3 LLSC Workarounds"
1440 depends on CPU_LOONGSON64
1442 Loongson-3 processors have the llsc issues which require workarounds.
1443 Without workarounds the system may hang unexpectedly.
1445 Newer Loongson-3 will fix these issues and no workarounds are needed.
1446 The workarounds have no significant side effect on them but may
1447 decrease the performance of the system so this option should be
1448 disabled unless the kernel is intended to be run on old systems.
1450 If unsure, please say Y.
1452 config CPU_LOONGSON3_CPUCFG_EMULATION
1453 bool "Emulate the CPUCFG instruction on older Loongson cores"
1455 depends on CPU_LOONGSON64
1457 Loongson-3A R4 and newer have the CPUCFG instruction available for
1458 userland to query CPU capabilities, much like CPUID on x86. This
1459 option provides emulation of the instruction on older Loongson
1460 cores, back to Loongson-3A1000.
1462 If unsure, please say Y.
1464 config CPU_LOONGSON2E
1466 depends on SYS_HAS_CPU_LOONGSON2E
1467 select CPU_LOONGSON2EF
1469 The Loongson 2E processor implements the MIPS III instruction set
1470 with many extensions.
1472 It has an internal FPGA northbridge, which is compatible to
1475 config CPU_LOONGSON2F
1477 depends on SYS_HAS_CPU_LOONGSON2F
1478 select CPU_LOONGSON2EF
1481 The Loongson 2F processor implements the MIPS III instruction set
1482 with many extensions.
1484 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1485 have a similar programming interface with FPGA northbridge used in
1488 config CPU_LOONGSON1B
1490 depends on SYS_HAS_CPU_LOONGSON1B
1491 select CPU_LOONGSON32
1492 select LEDS_GPIO_REGISTER
1494 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1495 Release 1 instruction set and part of the MIPS32 Release 2
1498 config CPU_LOONGSON1C
1500 depends on SYS_HAS_CPU_LOONGSON1C
1501 select CPU_LOONGSON32
1502 select LEDS_GPIO_REGISTER
1504 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1505 Release 1 instruction set and part of the MIPS32 Release 2
1508 config CPU_MIPS32_R1
1509 bool "MIPS32 Release 1"
1510 depends on SYS_HAS_CPU_MIPS32_R1
1511 select CPU_HAS_PREFETCH
1512 select CPU_SUPPORTS_32BIT_KERNEL
1513 select CPU_SUPPORTS_HIGHMEM
1515 Choose this option to build a kernel for release 1 or later of the
1516 MIPS32 architecture. Most modern embedded systems with a 32-bit
1517 MIPS processor are based on a MIPS32 processor. If you know the
1518 specific type of processor in your system, choose those that one
1519 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1520 Release 2 of the MIPS32 architecture is available since several
1521 years so chances are you even have a MIPS32 Release 2 processor
1522 in which case you should choose CPU_MIPS32_R2 instead for better
1525 config CPU_MIPS32_R2
1526 bool "MIPS32 Release 2"
1527 depends on SYS_HAS_CPU_MIPS32_R2
1528 select CPU_HAS_PREFETCH
1529 select CPU_SUPPORTS_32BIT_KERNEL
1530 select CPU_SUPPORTS_HIGHMEM
1531 select CPU_SUPPORTS_MSA
1534 Choose this option to build a kernel for release 2 or later of the
1535 MIPS32 architecture. Most modern embedded systems with a 32-bit
1536 MIPS processor are based on a MIPS32 processor. If you know the
1537 specific type of processor in your system, choose those that one
1538 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1540 config CPU_MIPS32_R5
1541 bool "MIPS32 Release 5"
1542 depends on SYS_HAS_CPU_MIPS32_R5
1543 select CPU_HAS_PREFETCH
1544 select CPU_SUPPORTS_32BIT_KERNEL
1545 select CPU_SUPPORTS_HIGHMEM
1546 select CPU_SUPPORTS_MSA
1548 select MIPS_O32_FP64_SUPPORT
1550 Choose this option to build a kernel for release 5 or later of the
1551 MIPS32 architecture. New MIPS processors, starting with the Warrior
1552 family, are based on a MIPS32r5 processor. If you own an older
1553 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1555 config CPU_MIPS32_R6
1556 bool "MIPS32 Release 6"
1557 depends on SYS_HAS_CPU_MIPS32_R6
1558 select CPU_HAS_PREFETCH
1559 select CPU_NO_LOAD_STORE_LR
1560 select CPU_SUPPORTS_32BIT_KERNEL
1561 select CPU_SUPPORTS_HIGHMEM
1562 select CPU_SUPPORTS_MSA
1564 select MIPS_O32_FP64_SUPPORT
1566 Choose this option to build a kernel for release 6 or later of the
1567 MIPS32 architecture. New MIPS processors, starting with the Warrior
1568 family, are based on a MIPS32r6 processor. If you own an older
1569 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1571 config CPU_MIPS64_R1
1572 bool "MIPS64 Release 1"
1573 depends on SYS_HAS_CPU_MIPS64_R1
1574 select CPU_HAS_PREFETCH
1575 select CPU_SUPPORTS_32BIT_KERNEL
1576 select CPU_SUPPORTS_64BIT_KERNEL
1577 select CPU_SUPPORTS_HIGHMEM
1578 select CPU_SUPPORTS_HUGEPAGES
1580 Choose this option to build a kernel for release 1 or later of the
1581 MIPS64 architecture. Many modern embedded systems with a 64-bit
1582 MIPS processor are based on a MIPS64 processor. If you know the
1583 specific type of processor in your system, choose those that one
1584 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1585 Release 2 of the MIPS64 architecture is available since several
1586 years so chances are you even have a MIPS64 Release 2 processor
1587 in which case you should choose CPU_MIPS64_R2 instead for better
1590 config CPU_MIPS64_R2
1591 bool "MIPS64 Release 2"
1592 depends on SYS_HAS_CPU_MIPS64_R2
1593 select CPU_HAS_PREFETCH
1594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
1596 select CPU_SUPPORTS_HIGHMEM
1597 select CPU_SUPPORTS_HUGEPAGES
1598 select CPU_SUPPORTS_MSA
1601 Choose this option to build a kernel for release 2 or later of the
1602 MIPS64 architecture. Many modern embedded systems with a 64-bit
1603 MIPS processor are based on a MIPS64 processor. If you know the
1604 specific type of processor in your system, choose those that one
1605 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1607 config CPU_MIPS64_R5
1608 bool "MIPS64 Release 5"
1609 depends on SYS_HAS_CPU_MIPS64_R5
1610 select CPU_HAS_PREFETCH
1611 select CPU_SUPPORTS_32BIT_KERNEL
1612 select CPU_SUPPORTS_64BIT_KERNEL
1613 select CPU_SUPPORTS_HIGHMEM
1614 select CPU_SUPPORTS_HUGEPAGES
1615 select CPU_SUPPORTS_MSA
1616 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1619 Choose this option to build a kernel for release 5 or later of the
1620 MIPS64 architecture. This is a intermediate MIPS architecture
1621 release partly implementing release 6 features. Though there is no
1622 any hardware known to be based on this release.
1624 config CPU_MIPS64_R6
1625 bool "MIPS64 Release 6"
1626 depends on SYS_HAS_CPU_MIPS64_R6
1627 select CPU_HAS_PREFETCH
1628 select CPU_NO_LOAD_STORE_LR
1629 select CPU_SUPPORTS_32BIT_KERNEL
1630 select CPU_SUPPORTS_64BIT_KERNEL
1631 select CPU_SUPPORTS_HIGHMEM
1632 select CPU_SUPPORTS_HUGEPAGES
1633 select CPU_SUPPORTS_MSA
1634 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1637 Choose this option to build a kernel for release 6 or later of the
1638 MIPS64 architecture. New MIPS processors, starting with the Warrior
1639 family, are based on a MIPS64r6 processor. If you own an older
1640 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1643 bool "MIPS Warrior P5600"
1644 depends on SYS_HAS_CPU_P5600
1645 select CPU_HAS_PREFETCH
1646 select CPU_SUPPORTS_32BIT_KERNEL
1647 select CPU_SUPPORTS_HIGHMEM
1648 select CPU_SUPPORTS_MSA
1649 select CPU_SUPPORTS_CPUFREQ
1650 select CPU_MIPSR2_IRQ_VI
1651 select CPU_MIPSR2_IRQ_EI
1653 select MIPS_O32_FP64_SUPPORT
1655 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1656 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1657 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1658 level features like up to six P5600 calculation cores, CM2 with L2
1659 cache, IOCU/IOMMU (though might be unused depending on the system-
1660 specific IP core configuration), GIC, CPC, virtualisation module,
1665 depends on SYS_HAS_CPU_R3000
1668 select CPU_SUPPORTS_32BIT_KERNEL
1669 select CPU_SUPPORTS_HIGHMEM
1671 Please make sure to pick the right CPU type. Linux/MIPS is not
1672 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1673 *not* work on R4000 machines and vice versa. However, since most
1674 of the supported machines have an R4000 (or similar) CPU, R4x00
1675 might be a safe bet. If the resulting kernel does not work,
1676 try to recompile with R3000.
1680 depends on SYS_HAS_CPU_TX39XX
1681 select CPU_SUPPORTS_32BIT_KERNEL
1686 depends on SYS_HAS_CPU_VR41XX
1687 select CPU_SUPPORTS_32BIT_KERNEL
1688 select CPU_SUPPORTS_64BIT_KERNEL
1690 The options selects support for the NEC VR4100 series of processors.
1691 Only choose this option if you have one of these processors as a
1692 kernel built with this option will not run on any other type of
1693 processor or vice versa.
1697 depends on SYS_HAS_CPU_R4300
1698 select CPU_SUPPORTS_32BIT_KERNEL
1699 select CPU_SUPPORTS_64BIT_KERNEL
1700 select CPU_HAS_LOAD_STORE_LR
1702 MIPS Technologies R4300-series processors.
1706 depends on SYS_HAS_CPU_R4X00
1707 select CPU_SUPPORTS_32BIT_KERNEL
1708 select CPU_SUPPORTS_64BIT_KERNEL
1709 select CPU_SUPPORTS_HUGEPAGES
1711 MIPS Technologies R4000-series processors other than 4300, including
1712 the R4000, R4400, R4600, and 4700.
1716 depends on SYS_HAS_CPU_TX49XX
1717 select CPU_HAS_PREFETCH
1718 select CPU_SUPPORTS_32BIT_KERNEL
1719 select CPU_SUPPORTS_64BIT_KERNEL
1720 select CPU_SUPPORTS_HUGEPAGES
1724 depends on SYS_HAS_CPU_R5000
1725 select CPU_SUPPORTS_32BIT_KERNEL
1726 select CPU_SUPPORTS_64BIT_KERNEL
1727 select CPU_SUPPORTS_HUGEPAGES
1729 MIPS Technologies R5000-series processors other than the Nevada.
1733 depends on SYS_HAS_CPU_R5500
1734 select CPU_SUPPORTS_32BIT_KERNEL
1735 select CPU_SUPPORTS_64BIT_KERNEL
1736 select CPU_SUPPORTS_HUGEPAGES
1738 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1743 depends on SYS_HAS_CPU_NEVADA
1744 select CPU_SUPPORTS_32BIT_KERNEL
1745 select CPU_SUPPORTS_64BIT_KERNEL
1746 select CPU_SUPPORTS_HUGEPAGES
1748 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1752 depends on SYS_HAS_CPU_R10000
1753 select CPU_HAS_PREFETCH
1754 select CPU_SUPPORTS_32BIT_KERNEL
1755 select CPU_SUPPORTS_64BIT_KERNEL
1756 select CPU_SUPPORTS_HIGHMEM
1757 select CPU_SUPPORTS_HUGEPAGES
1759 MIPS Technologies R10000-series processors.
1763 depends on SYS_HAS_CPU_RM7000
1764 select CPU_HAS_PREFETCH
1765 select CPU_SUPPORTS_32BIT_KERNEL
1766 select CPU_SUPPORTS_64BIT_KERNEL
1767 select CPU_SUPPORTS_HIGHMEM
1768 select CPU_SUPPORTS_HUGEPAGES
1772 depends on SYS_HAS_CPU_SB1
1773 select CPU_SUPPORTS_32BIT_KERNEL
1774 select CPU_SUPPORTS_64BIT_KERNEL
1775 select CPU_SUPPORTS_HIGHMEM
1776 select CPU_SUPPORTS_HUGEPAGES
1777 select WEAK_ORDERING
1779 config CPU_CAVIUM_OCTEON
1780 bool "Cavium Octeon processor"
1781 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1782 select CPU_HAS_PREFETCH
1783 select CPU_SUPPORTS_64BIT_KERNEL
1784 select WEAK_ORDERING
1785 select CPU_SUPPORTS_HIGHMEM
1786 select CPU_SUPPORTS_HUGEPAGES
1787 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1788 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1789 select MIPS_L1_CACHE_SHIFT_7
1792 The Cavium Octeon processor is a highly integrated chip containing
1793 many ethernet hardware widgets for networking tasks. The processor
1794 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1795 Full details can be found at http://www.caviumnetworks.com.
1798 bool "Broadcom BMIPS"
1799 depends on SYS_HAS_CPU_BMIPS
1801 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1802 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1803 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1804 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1805 select CPU_SUPPORTS_32BIT_KERNEL
1806 select DMA_NONCOHERENT
1808 select SWAP_IO_SPACE
1809 select WEAK_ORDERING
1810 select CPU_SUPPORTS_HIGHMEM
1811 select CPU_HAS_PREFETCH
1812 select CPU_SUPPORTS_CPUFREQ
1813 select MIPS_EXTERNAL_TIMER
1815 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1818 bool "Netlogic XLR SoC"
1819 depends on SYS_HAS_CPU_XLR
1820 select CPU_SUPPORTS_32BIT_KERNEL
1821 select CPU_SUPPORTS_64BIT_KERNEL
1822 select CPU_SUPPORTS_HIGHMEM
1823 select CPU_SUPPORTS_HUGEPAGES
1824 select WEAK_ORDERING
1825 select WEAK_REORDERING_BEYOND_LLSC
1827 Netlogic Microsystems XLR/XLS processors.
1830 bool "Netlogic XLP SoC"
1831 depends on SYS_HAS_CPU_XLP
1832 select CPU_SUPPORTS_32BIT_KERNEL
1833 select CPU_SUPPORTS_64BIT_KERNEL
1834 select CPU_SUPPORTS_HIGHMEM
1835 select WEAK_ORDERING
1836 select WEAK_REORDERING_BEYOND_LLSC
1837 select CPU_HAS_PREFETCH
1839 select CPU_SUPPORTS_HUGEPAGES
1840 select MIPS_ASID_BITS_VARIABLE
1842 Netlogic Microsystems XLP processors.
1845 config CPU_MIPS32_3_5_FEATURES
1846 bool "MIPS32 Release 3.5 Features"
1847 depends on SYS_HAS_CPU_MIPS32_R3_5
1848 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1851 Choose this option to build a kernel for release 2 or later of the
1852 MIPS32 architecture including features from the 3.5 release such as
1853 support for Enhanced Virtual Addressing (EVA).
1855 config CPU_MIPS32_3_5_EVA
1856 bool "Enhanced Virtual Addressing (EVA)"
1857 depends on CPU_MIPS32_3_5_FEATURES
1861 Choose this option if you want to enable the Enhanced Virtual
1862 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1863 One of its primary benefits is an increase in the maximum size
1864 of lowmem (up to 3GB). If unsure, say 'N' here.
1866 config CPU_MIPS32_R5_FEATURES
1867 bool "MIPS32 Release 5 Features"
1868 depends on SYS_HAS_CPU_MIPS32_R5
1869 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1871 Choose this option to build a kernel for release 2 or later of the
1872 MIPS32 architecture including features from release 5 such as
1873 support for Extended Physical Addressing (XPA).
1875 config CPU_MIPS32_R5_XPA
1876 bool "Extended Physical Addressing (XPA)"
1877 depends on CPU_MIPS32_R5_FEATURES
1879 depends on !PAGE_SIZE_4KB
1880 depends on SYS_SUPPORTS_HIGHMEM
1883 select PHYS_ADDR_T_64BIT
1886 Choose this option if you want to enable the Extended Physical
1887 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1888 benefit is to increase physical addressing equal to or greater
1889 than 40 bits. Note that this has the side effect of turning on
1890 64-bit addressing which in turn makes the PTEs 64-bit in size.
1891 If unsure, say 'N' here.
1894 config CPU_NOP_WORKAROUNDS
1897 config CPU_JUMP_WORKAROUNDS
1900 config CPU_LOONGSON2F_WORKAROUNDS
1901 bool "Loongson 2F Workarounds"
1903 select CPU_NOP_WORKAROUNDS
1904 select CPU_JUMP_WORKAROUNDS
1906 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1907 require workarounds. Without workarounds the system may hang
1908 unexpectedly. For more information please refer to the gas
1909 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1911 Loongson 2F03 and later have fixed these issues and no workarounds
1912 are needed. The workarounds have no significant side effect on them
1913 but may decrease the performance of the system so this option should
1914 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1917 If unsure, please say Y.
1918 endif # CPU_LOONGSON2F
1920 config SYS_SUPPORTS_ZBOOT
1922 select HAVE_KERNEL_GZIP
1923 select HAVE_KERNEL_BZIP2
1924 select HAVE_KERNEL_LZ4
1925 select HAVE_KERNEL_LZMA
1926 select HAVE_KERNEL_LZO
1927 select HAVE_KERNEL_XZ
1928 select HAVE_KERNEL_ZSTD
1930 config SYS_SUPPORTS_ZBOOT_UART16550
1932 select SYS_SUPPORTS_ZBOOT
1934 config SYS_SUPPORTS_ZBOOT_UART_PROM
1936 select SYS_SUPPORTS_ZBOOT
1938 config CPU_LOONGSON2EF
1940 select CPU_SUPPORTS_32BIT_KERNEL
1941 select CPU_SUPPORTS_64BIT_KERNEL
1942 select CPU_SUPPORTS_HIGHMEM
1943 select CPU_SUPPORTS_HUGEPAGES
1944 select ARCH_HAS_PHYS_TO_DMA
1946 config CPU_LOONGSON32
1950 select CPU_HAS_PREFETCH
1951 select CPU_SUPPORTS_32BIT_KERNEL
1952 select CPU_SUPPORTS_HIGHMEM
1953 select CPU_SUPPORTS_CPUFREQ
1955 config CPU_BMIPS32_3300
1956 select SMP_UP if SMP
1959 config CPU_BMIPS4350
1961 select SYS_SUPPORTS_SMP
1962 select SYS_SUPPORTS_HOTPLUG_CPU
1964 config CPU_BMIPS4380
1966 select MIPS_L1_CACHE_SHIFT_6
1967 select SYS_SUPPORTS_SMP
1968 select SYS_SUPPORTS_HOTPLUG_CPU
1971 config CPU_BMIPS5000
1973 select MIPS_CPU_SCACHE
1974 select MIPS_L1_CACHE_SHIFT_7
1975 select SYS_SUPPORTS_SMP
1976 select SYS_SUPPORTS_HOTPLUG_CPU
1979 config SYS_HAS_CPU_LOONGSON64
1981 select CPU_SUPPORTS_CPUFREQ
1984 config SYS_HAS_CPU_LOONGSON2E
1987 config SYS_HAS_CPU_LOONGSON2F
1989 select CPU_SUPPORTS_CPUFREQ
1990 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1992 config SYS_HAS_CPU_LOONGSON1B
1995 config SYS_HAS_CPU_LOONGSON1C
1998 config SYS_HAS_CPU_MIPS32_R1
2001 config SYS_HAS_CPU_MIPS32_R2
2004 config SYS_HAS_CPU_MIPS32_R3_5
2007 config SYS_HAS_CPU_MIPS32_R5
2009 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2011 config SYS_HAS_CPU_MIPS32_R6
2013 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2015 config SYS_HAS_CPU_MIPS64_R1
2018 config SYS_HAS_CPU_MIPS64_R2
2021 config SYS_HAS_CPU_MIPS64_R6
2023 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2025 config SYS_HAS_CPU_P5600
2027 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2029 config SYS_HAS_CPU_R3000
2032 config SYS_HAS_CPU_TX39XX
2035 config SYS_HAS_CPU_VR41XX
2038 config SYS_HAS_CPU_R4300
2041 config SYS_HAS_CPU_R4X00
2044 config SYS_HAS_CPU_TX49XX
2047 config SYS_HAS_CPU_R5000
2050 config SYS_HAS_CPU_R5500
2053 config SYS_HAS_CPU_NEVADA
2056 config SYS_HAS_CPU_R10000
2058 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2060 config SYS_HAS_CPU_RM7000
2063 config SYS_HAS_CPU_SB1
2066 config SYS_HAS_CPU_CAVIUM_OCTEON
2069 config SYS_HAS_CPU_BMIPS
2072 config SYS_HAS_CPU_BMIPS32_3300
2074 select SYS_HAS_CPU_BMIPS
2076 config SYS_HAS_CPU_BMIPS4350
2078 select SYS_HAS_CPU_BMIPS
2080 config SYS_HAS_CPU_BMIPS4380
2082 select SYS_HAS_CPU_BMIPS
2084 config SYS_HAS_CPU_BMIPS5000
2086 select SYS_HAS_CPU_BMIPS
2087 select ARCH_HAS_SYNC_DMA_FOR_CPU
2089 config SYS_HAS_CPU_XLR
2092 config SYS_HAS_CPU_XLP
2096 # CPU may reorder R->R, R->W, W->R, W->W
2097 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2099 config WEAK_ORDERING
2103 # CPU may reorder reads and writes beyond LL/SC
2104 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2106 config WEAK_REORDERING_BEYOND_LLSC
2111 # These two indicate any level of the MIPS32 and MIPS64 architecture
2115 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2116 CPU_MIPS32_R6 || CPU_P5600
2120 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2124 # These indicate the revision of the architecture
2128 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2132 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2134 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2139 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2141 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2146 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2148 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2149 select HAVE_ARCH_BITREVERSE
2150 select MIPS_ASID_BITS_VARIABLE
2151 select MIPS_CRC_SUPPORT
2154 config TARGET_ISA_REV
2156 default 1 if CPU_MIPSR1
2157 default 2 if CPU_MIPSR2
2158 default 5 if CPU_MIPSR5
2159 default 6 if CPU_MIPSR6
2162 Reflects the ISA revision being targeted by the kernel build. This
2163 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2171 config SYS_SUPPORTS_32BIT_KERNEL
2173 config SYS_SUPPORTS_64BIT_KERNEL
2175 config CPU_SUPPORTS_32BIT_KERNEL
2177 config CPU_SUPPORTS_64BIT_KERNEL
2179 config CPU_SUPPORTS_CPUFREQ
2181 config CPU_SUPPORTS_ADDRWINCFG
2183 config CPU_SUPPORTS_HUGEPAGES
2185 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2186 config MIPS_PGD_C0_CONTEXT
2188 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2191 # Set to y for ptrace access to watch registers.
2193 config HARDWARE_WATCHPOINTS
2195 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2200 prompt "Kernel code model"
2202 You should only select this option if you have a workload that
2203 actually benefits from 64-bit processing or if your machine has
2204 large memory. You will only be presented a single option in this
2205 menu if your system does not support both 32-bit and 64-bit kernels.
2208 bool "32-bit kernel"
2209 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2212 Select this option if you want to build a 32-bit kernel.
2215 bool "64-bit kernel"
2216 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2218 Select this option if you want to build a 64-bit kernel.
2223 bool "KVM Guest Kernel"
2224 depends on CPU_MIPS32_R2
2225 depends on !64BIT && BROKEN_ON_SMP
2227 Select this option if building a guest kernel for KVM (Trap & Emulate)
2230 config KVM_GUEST_TIMER_FREQ
2231 int "Count/Compare Timer Frequency (MHz)"
2232 depends on KVM_GUEST
2235 Set this to non-zero if building a guest kernel for KVM to skip RTC
2236 emulation when determining guest CPU Frequency. Instead, the guest's
2237 timer frequency is specified directly.
2239 config MIPS_VA_BITS_48
2240 bool "48 bits virtual memory"
2243 Support a maximum at least 48 bits of application virtual
2244 memory. Default is 40 bits or less, depending on the CPU.
2245 For page sizes 16k and above, this option results in a small
2246 memory overhead for page tables. For 4k page size, a fourth
2247 level of page tables is added which imposes both a memory
2248 overhead as well as slower TLB fault handling.
2253 prompt "Kernel page size"
2254 default PAGE_SIZE_4KB
2256 config PAGE_SIZE_4KB
2258 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2260 This option select the standard 4kB Linux page size. On some
2261 R3000-family processors this is the only available page size. Using
2262 4kB page size will minimize memory consumption and is therefore
2263 recommended for low memory systems.
2265 config PAGE_SIZE_8KB
2267 depends on CPU_CAVIUM_OCTEON
2268 depends on !MIPS_VA_BITS_48
2270 Using 8kB page size will result in higher performance kernel at
2271 the price of higher memory consumption. This option is available
2272 only on cnMIPS processors. Note that you will need a suitable Linux
2273 distribution to support this.
2275 config PAGE_SIZE_16KB
2277 depends on !CPU_R3000 && !CPU_TX39XX
2279 Using 16kB page size will result in higher performance kernel at
2280 the price of higher memory consumption. This option is available on
2281 all non-R3000 family processors. Note that you will need a suitable
2282 Linux distribution to support this.
2284 config PAGE_SIZE_32KB
2286 depends on CPU_CAVIUM_OCTEON
2287 depends on !MIPS_VA_BITS_48
2289 Using 32kB page size will result in higher performance kernel at
2290 the price of higher memory consumption. This option is available
2291 only on cnMIPS cores. Note that you will need a suitable Linux
2292 distribution to support this.
2294 config PAGE_SIZE_64KB
2296 depends on !CPU_R3000 && !CPU_TX39XX
2298 Using 64kB page size will result in higher performance kernel at
2299 the price of higher memory consumption. This option is available on
2300 all non-R3000 family processor. Not that at the time of this
2301 writing this option is still high experimental.
2305 config FORCE_MAX_ZONEORDER
2306 int "Maximum zone order"
2307 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2308 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2309 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2310 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2311 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2312 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2316 The kernel memory allocator divides physically contiguous memory
2317 blocks into "zones", where each zone is a power of two number of
2318 pages. This option selects the largest power of two that the kernel
2319 keeps in the memory allocator. If you need to allocate very large
2320 blocks of physically contiguous memory, then you may need to
2321 increase this value.
2323 This config option is actually maximum order plus one. For example,
2324 a value of 11 means that the largest free memory block is 2^10 pages.
2326 The page size is not necessarily 4KB. Keep this in mind
2327 when choosing a value for this option.
2332 config IP22_CPU_SCACHE
2337 # Support for a MIPS32 / MIPS64 style S-caches
2339 config MIPS_CPU_SCACHE
2343 config R5000_CPU_SCACHE
2347 config RM7000_CPU_SCACHE
2351 config SIBYTE_DMA_PAGEOPS
2352 bool "Use DMA to clear/copy pages"
2355 Instead of using the CPU to zero and copy pages, use a Data Mover
2356 channel. These DMA channels are otherwise unused by the standard
2357 SiByte Linux port. Seems to give a small performance benefit.
2359 config CPU_HAS_PREFETCH
2362 config CPU_GENERIC_DUMP_TLB
2364 default y if !(CPU_R3000 || CPU_TX39XX)
2366 config MIPS_FP_SUPPORT
2367 bool "Floating Point support" if EXPERT
2370 Select y to include support for floating point in the kernel
2371 including initialization of FPU hardware, FP context save & restore
2372 and emulation of an FPU where necessary. Without this support any
2373 userland program attempting to use floating point instructions will
2376 If you know that your userland will not attempt to use floating point
2377 instructions then you can say n here to shrink the kernel a little.
2381 config CPU_R2300_FPU
2383 depends on MIPS_FP_SUPPORT
2384 default y if CPU_R3000 || CPU_TX39XX
2391 depends on MIPS_FP_SUPPORT
2392 default y if !CPU_R2300_FPU
2394 config CPU_R4K_CACHE_TLB
2396 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2399 bool "MIPS MT SMP support (1 TC on each available VPE)"
2401 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2402 select CPU_MIPSR2_IRQ_VI
2403 select CPU_MIPSR2_IRQ_EI
2408 select SYS_SUPPORTS_SMP
2409 select SYS_SUPPORTS_SCHED_SMT
2410 select MIPS_PERF_SHARED_TC_COUNTERS
2412 This is a kernel model which is known as SMVP. This is supported
2413 on cores with the MT ASE and uses the available VPEs to implement
2414 virtual processors which supports SMP. This is equivalent to the
2415 Intel Hyperthreading feature. For further information go to
2416 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2422 bool "SMT (multithreading) scheduler support"
2423 depends on SYS_SUPPORTS_SCHED_SMT
2426 SMT scheduler support improves the CPU scheduler's decision making
2427 when dealing with MIPS MT enabled cores at a cost of slightly
2428 increased overhead in some places. If unsure say N here.
2430 config SYS_SUPPORTS_SCHED_SMT
2433 config SYS_SUPPORTS_MULTITHREADING
2436 config MIPS_MT_FPAFF
2437 bool "Dynamic FPU affinity for FP-intensive threads"
2439 depends on MIPS_MT_SMP
2441 config MIPSR2_TO_R6_EMULATOR
2442 bool "MIPS R2-to-R6 emulator"
2443 depends on CPU_MIPSR6
2444 depends on MIPS_FP_SUPPORT
2447 Choose this option if you want to run non-R6 MIPS userland code.
2448 Even if you say 'Y' here, the emulator will still be disabled by
2449 default. You can enable it using the 'mipsr2emu' kernel option.
2450 The only reason this is a build-time option is to save ~14K from the
2453 config SYS_SUPPORTS_VPE_LOADER
2455 depends on SYS_SUPPORTS_MULTITHREADING
2457 Indicates that the platform supports the VPE loader, and provides
2460 config MIPS_VPE_LOADER
2461 bool "VPE loader support."
2462 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2463 select CPU_MIPSR2_IRQ_VI
2464 select CPU_MIPSR2_IRQ_EI
2467 Includes a loader for loading an elf relocatable object
2468 onto another VPE and running it.
2470 config MIPS_VPE_LOADER_CMP
2473 depends on MIPS_VPE_LOADER && MIPS_CMP
2475 config MIPS_VPE_LOADER_MT
2478 depends on MIPS_VPE_LOADER && !MIPS_CMP
2480 config MIPS_VPE_LOADER_TOM
2481 bool "Load VPE program into memory hidden from linux"
2482 depends on MIPS_VPE_LOADER
2485 The loader can use memory that is present but has been hidden from
2486 Linux using the kernel command line option "mem=xxMB". It's up to
2487 you to ensure the amount you put in the option and the space your
2488 program requires is less or equal to the amount physically present.
2490 config MIPS_VPE_APSP_API
2491 bool "Enable support for AP/SP API (RTLX)"
2492 depends on MIPS_VPE_LOADER
2494 config MIPS_VPE_APSP_API_CMP
2497 depends on MIPS_VPE_APSP_API && MIPS_CMP
2499 config MIPS_VPE_APSP_API_MT
2502 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2505 bool "MIPS CMP framework support (DEPRECATED)"
2506 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2509 select SYS_SUPPORTS_SMP
2510 select WEAK_ORDERING
2513 Select this if you are using a bootloader which implements the "CMP
2514 framework" protocol (ie. YAMON) and want your kernel to make use of
2515 its ability to start secondary CPUs.
2517 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2521 bool "MIPS Coherent Processing System support"
2522 depends on SYS_SUPPORTS_MIPS_CPS
2524 select MIPS_CPS_PM if HOTPLUG_CPU
2526 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2527 select SYS_SUPPORTS_HOTPLUG_CPU
2528 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2529 select SYS_SUPPORTS_SMP
2530 select WEAK_ORDERING
2531 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2533 Select this if you wish to run an SMP kernel across multiple cores
2534 within a MIPS Coherent Processing System. When this option is
2535 enabled the kernel will probe for other cores and boot them with
2536 no external assistance. It is safe to enable this when hardware
2537 support is unavailable.
2550 config SB1_PASS_2_WORKAROUNDS
2552 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2555 config SB1_PASS_2_1_WORKAROUNDS
2557 depends on CPU_SB1 && CPU_SB1_PASS_2
2561 prompt "SmartMIPS or microMIPS ASE support"
2563 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2566 Select this if you want neither microMIPS nor SmartMIPS support
2568 config CPU_HAS_SMARTMIPS
2569 depends on SYS_SUPPORTS_SMARTMIPS
2572 SmartMIPS is a extension of the MIPS32 architecture aimed at
2573 increased security at both hardware and software level for
2574 smartcards. Enabling this option will allow proper use of the
2575 SmartMIPS instructions by Linux applications. However a kernel with
2576 this option will not work on a MIPS core without SmartMIPS core. If
2577 you don't know you probably don't have SmartMIPS and should say N
2580 config CPU_MICROMIPS
2581 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2584 When this option is enabled the kernel will be built using the
2590 bool "Support for the MIPS SIMD Architecture"
2591 depends on CPU_SUPPORTS_MSA
2592 depends on MIPS_FP_SUPPORT
2593 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2595 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2596 and a set of SIMD instructions to operate on them. When this option
2597 is enabled the kernel will support allocating & switching MSA
2598 vector register contexts. If you know that your kernel will only be
2599 running on CPUs which do not support MSA or that your userland will
2600 not be making use of it then you may wish to say N here to reduce
2601 the size & complexity of your kernel.
2612 depends on !CPU_DIEI_BROKEN
2615 config CPU_DIEI_BROKEN
2621 config CPU_NO_LOAD_STORE_LR
2624 CPU lacks support for unaligned load and store instructions:
2625 LWL, LWR, SWL, SWR (Load/store word left/right).
2626 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2630 # Vectored interrupt mode is an R2 feature
2632 config CPU_MIPSR2_IRQ_VI
2636 # Extended interrupt mode is an R2 feature
2638 config CPU_MIPSR2_IRQ_EI
2643 depends on !CPU_R3000
2649 config CPU_DADDI_WORKAROUNDS
2652 config CPU_R4000_WORKAROUNDS
2654 select CPU_R4400_WORKAROUNDS
2656 config CPU_R4400_WORKAROUNDS
2659 config CPU_R4X00_BUGS64
2661 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2663 config MIPS_ASID_SHIFT
2665 default 6 if CPU_R3000 || CPU_TX39XX
2668 config MIPS_ASID_BITS
2670 default 0 if MIPS_ASID_BITS_VARIABLE
2671 default 6 if CPU_R3000 || CPU_TX39XX
2674 config MIPS_ASID_BITS_VARIABLE
2677 config MIPS_CRC_SUPPORT
2680 # R4600 erratum. Due to the lack of errata information the exact
2681 # technical details aren't known. I've experimentally found that disabling
2682 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2684 config WAR_R4600_V1_INDEX_ICACHEOP
2687 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2689 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2690 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2691 # executed if there is no other dcache activity. If the dcache is
2692 # accessed for another instruction immediately preceding when these
2693 # cache instructions are executing, it is possible that the dcache
2694 # tag match outputs used by these cache instructions will be
2695 # incorrect. These cache instructions should be preceded by at least
2696 # four instructions that are not any kind of load or store
2699 # This is not allowed: lw
2703 # cache Hit_Writeback_Invalidate_D
2705 # This is allowed: lw
2710 # cache Hit_Writeback_Invalidate_D
2711 config WAR_R4600_V1_HIT_CACHEOP
2714 # Writeback and invalidate the primary cache dcache before DMA.
2716 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2717 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2718 # operate correctly if the internal data cache refill buffer is empty. These
2719 # CACHE instructions should be separated from any potential data cache miss
2720 # by a load instruction to an uncached address to empty the response buffer."
2721 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2723 config WAR_R4600_V2_HIT_CACHEOP
2726 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2727 # the line which this instruction itself exists, the following
2728 # operation is not guaranteed."
2730 # Workaround: do two phase flushing for Index_Invalidate_I
2731 config WAR_TX49XX_ICACHE_INDEX_INV
2734 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2735 # opposes it being called that) where invalid instructions in the same
2736 # I-cache line worth of instructions being fetched may case spurious
2738 config WAR_ICACHE_REFILLS
2741 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2742 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2743 config WAR_R10000_LLSC
2746 # 34K core erratum: "Problems Executing the TLBR Instruction"
2747 config WAR_MIPS34K_MISSED_ITLB
2751 # - Highmem only makes sense for the 32-bit kernel.
2752 # - The current highmem code will only work properly on physically indexed
2753 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2754 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2755 # moment we protect the user and offer the highmem option only on machines
2756 # where it's known to be safe. This will not offer highmem on a few systems
2757 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2758 # indexed CPUs but we're playing safe.
2759 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2760 # know they might have memory configurations that could make use of highmem
2764 bool "High Memory Support"
2765 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2768 config CPU_SUPPORTS_HIGHMEM
2771 config SYS_SUPPORTS_HIGHMEM
2774 config SYS_SUPPORTS_SMARTMIPS
2777 config SYS_SUPPORTS_MICROMIPS
2780 config SYS_SUPPORTS_MIPS16
2783 This option must be set if a kernel might be executed on a MIPS16-
2784 enabled CPU even if MIPS16 is not actually being used. In other
2785 words, it makes the kernel MIPS16-tolerant.
2787 config CPU_SUPPORTS_MSA
2790 config ARCH_FLATMEM_ENABLE
2792 depends on !NUMA && !CPU_LOONGSON2EF
2794 config ARCH_SPARSEMEM_ENABLE
2796 select SPARSEMEM_STATIC if !SGI_IP27
2800 depends on SYS_SUPPORTS_NUMA
2803 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2804 Access). This option improves performance on systems with more
2805 than two nodes; on two node systems it is generally better to
2806 leave it disabled; on single node systems leave this option
2809 config SYS_SUPPORTS_NUMA
2812 config HAVE_SETUP_PER_CPU_AREA
2816 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2821 bool "Relocatable kernel"
2822 depends on SYS_SUPPORTS_RELOCATABLE
2823 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2824 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2825 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2826 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2829 This builds a kernel image that retains relocation information
2830 so it can be loaded someplace besides the default 1MB.
2831 The relocations make the kernel binary about 15% larger,
2832 but are discarded at runtime
2834 config RELOCATION_TABLE_SIZE
2835 hex "Relocation table size"
2836 depends on RELOCATABLE
2837 range 0x0 0x01000000
2838 default "0x00200000" if CPU_LOONGSON64
2839 default "0x00100000"
2841 A table of relocation data will be appended to the kernel binary
2842 and parsed at boot to fix up the relocated kernel.
2844 This option allows the amount of space reserved for the table to be
2845 adjusted, although the default of 1Mb should be ok in most cases.
2847 The build will fail and a valid size suggested if this is too small.
2849 If unsure, leave at the default value.
2851 config RANDOMIZE_BASE
2852 bool "Randomize the address of the kernel image"
2853 depends on RELOCATABLE
2855 Randomizes the physical and virtual address at which the
2856 kernel image is loaded, as a security feature that
2857 deters exploit attempts relying on knowledge of the location
2858 of kernel internals.
2860 Entropy is generated using any coprocessor 0 registers available.
2862 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2866 config RANDOMIZE_BASE_MAX_OFFSET
2867 hex "Maximum kASLR offset" if EXPERT
2868 depends on RANDOMIZE_BASE
2869 range 0x0 0x40000000 if EVA || 64BIT
2870 range 0x0 0x08000000
2871 default "0x01000000"
2873 When kASLR is active, this provides the maximum offset that will
2874 be applied to the kernel image. It should be set according to the
2875 amount of physical RAM available in the target system minus
2876 PHYSICAL_START and must be a power of 2.
2878 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2879 EVA or 64-bit. The default is 16Mb.
2884 depends on NEED_MULTIPLE_NODES
2886 config HW_PERF_EVENTS
2887 bool "Enable hardware performance counter support for perf events"
2888 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2891 Enable hardware performance counter support for perf events. If
2892 disabled, perf events will use software events only.
2895 bool "Enable DMI scanning"
2896 depends on MACH_LOONGSON64
2897 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2900 Enabled scanning of DMI to identify machine quirks. Say Y
2901 here unless you have verified that your setup is not
2902 affected by entries in the DMI blacklist. Required by PNP
2906 bool "Multi-Processing support"
2907 depends on SYS_SUPPORTS_SMP
2909 This enables support for systems with more than one CPU. If you have
2910 a system with only one CPU, say N. If you have a system with more
2911 than one CPU, say Y.
2913 If you say N here, the kernel will run on uni- and multiprocessor
2914 machines, but will use only one CPU of a multiprocessor machine. If
2915 you say Y here, the kernel will run on many, but not all,
2916 uniprocessor machines. On a uniprocessor machine, the kernel
2917 will run faster if you say N here.
2919 People using multiprocessor machines who say Y here should also say
2920 Y to "Enhanced Real Time Clock Support", below.
2922 See also the SMP-HOWTO available at
2923 <https://www.tldp.org/docs.html#howto>.
2925 If you don't know what to do here, say N.
2928 bool "Support for hot-pluggable CPUs"
2929 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2931 Say Y here to allow turning CPUs off and on. CPUs can be
2932 controlled through /sys/devices/system/cpu.
2933 (Note: power management support will enable this option
2934 automatically on SMP systems. )
2935 Say N if you want to disable CPU hotplug.
2940 config SYS_SUPPORTS_MIPS_CMP
2943 config SYS_SUPPORTS_MIPS_CPS
2946 config SYS_SUPPORTS_SMP
2949 config NR_CPUS_DEFAULT_4
2952 config NR_CPUS_DEFAULT_8
2955 config NR_CPUS_DEFAULT_16
2958 config NR_CPUS_DEFAULT_32
2961 config NR_CPUS_DEFAULT_64
2965 int "Maximum number of CPUs (2-256)"
2968 default "4" if NR_CPUS_DEFAULT_4
2969 default "8" if NR_CPUS_DEFAULT_8
2970 default "16" if NR_CPUS_DEFAULT_16
2971 default "32" if NR_CPUS_DEFAULT_32
2972 default "64" if NR_CPUS_DEFAULT_64
2974 This allows you to specify the maximum number of CPUs which this
2975 kernel will support. The maximum supported value is 32 for 32-bit
2976 kernel and 64 for 64-bit kernels; the minimum value which makes
2977 sense is 1 for Qemu (useful only for kernel debugging purposes)
2978 and 2 for all others.
2980 This is purely to save memory - each supported CPU adds
2981 approximately eight kilobytes to the kernel image. For best
2982 performance should round up your number of processors to the next
2985 config MIPS_PERF_SHARED_TC_COUNTERS
2988 config MIPS_NR_CPU_NR_MAP_1024
2991 config MIPS_NR_CPU_NR_MAP
2994 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2995 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2998 # Timer Interrupt Frequency Configuration
3002 prompt "Timer frequency"
3005 Allows the configuration of the timer frequency.
3008 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
3011 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
3014 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
3017 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3020 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3023 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3026 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3029 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3033 config SYS_SUPPORTS_24HZ
3036 config SYS_SUPPORTS_48HZ
3039 config SYS_SUPPORTS_100HZ
3042 config SYS_SUPPORTS_128HZ
3045 config SYS_SUPPORTS_250HZ
3048 config SYS_SUPPORTS_256HZ
3051 config SYS_SUPPORTS_1000HZ
3054 config SYS_SUPPORTS_1024HZ
3057 config SYS_SUPPORTS_ARBIT_HZ
3059 default y if !SYS_SUPPORTS_24HZ && \
3060 !SYS_SUPPORTS_48HZ && \
3061 !SYS_SUPPORTS_100HZ && \
3062 !SYS_SUPPORTS_128HZ && \
3063 !SYS_SUPPORTS_250HZ && \
3064 !SYS_SUPPORTS_256HZ && \
3065 !SYS_SUPPORTS_1000HZ && \
3066 !SYS_SUPPORTS_1024HZ
3072 default 100 if HZ_100
3073 default 128 if HZ_128
3074 default 250 if HZ_250
3075 default 256 if HZ_256
3076 default 1000 if HZ_1000
3077 default 1024 if HZ_1024
3080 def_bool HIGH_RES_TIMERS
3083 bool "Kexec system call"
3086 kexec is a system call that implements the ability to shutdown your
3087 current kernel, and to start another kernel. It is like a reboot
3088 but it is independent of the system firmware. And like a reboot
3089 you can start any kernel with it, not just Linux.
3091 The name comes from the similarity to the exec system call.
3093 It is an ongoing process to be certain the hardware in a machine
3094 is properly shutdown, so do not be surprised if this code does not
3095 initially work for you. As of this writing the exact hardware
3096 interface is strongly in flux, so no good recommendation can be
3100 bool "Kernel crash dumps"
3102 Generate crash dump after being started by kexec.
3103 This should be normally only set in special crash dump kernels
3104 which are loaded in the main kernel with kexec-tools into
3105 a specially reserved region and then later executed after
3106 a crash by kdump/kexec. The crash dump kernel must be compiled
3107 to a memory address not used by the main kernel or firmware using
3110 config PHYSICAL_START
3111 hex "Physical address where the kernel is loaded"
3112 default "0xffffffff84000000"
3113 depends on CRASH_DUMP
3115 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3116 If you plan to use kernel for capturing the crash dump change
3117 this value to start of the reserved region (the "X" value as
3118 specified in the "crashkernel=YM@XM" command line boot parameter
3119 passed to the panic-ed kernel).
3121 config MIPS_O32_FP64_SUPPORT
3122 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3123 depends on 32BIT || MIPS32_O32
3125 When this is enabled, the kernel will support use of 64-bit floating
3126 point registers with binaries using the O32 ABI along with the
3127 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3128 32-bit MIPS systems this support is at the cost of increasing the
3129 size and complexity of the compiled FPU emulator. Thus if you are
3130 running a MIPS32 system and know that none of your userland binaries
3131 will require 64-bit floating point, you may wish to reduce the size
3132 of your kernel & potentially improve FP emulation performance by
3135 Although binutils currently supports use of this flag the details
3136 concerning its effect upon the O32 ABI in userland are still being
3137 worked on. In order to avoid userland becoming dependent upon current
3138 behaviour before the details have been finalised, this option should
3139 be considered experimental and only enabled by those working upon
3147 select OF_EARLY_FLATTREE
3157 prompt "Kernel appended dtb support" if USE_OF
3158 default MIPS_NO_APPENDED_DTB
3160 config MIPS_NO_APPENDED_DTB
3163 Do not enable appended dtb support.
3165 config MIPS_ELF_APPENDED_DTB
3168 With this option, the boot code will look for a device tree binary
3169 DTB) included in the vmlinux ELF section .appended_dtb. By default
3170 it is empty and the DTB can be appended using binutils command
3173 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3175 This is meant as a backward compatibility convenience for those
3176 systems with a bootloader that can't be upgraded to accommodate
3177 the documented boot protocol using a device tree.
3179 config MIPS_RAW_APPENDED_DTB
3180 bool "vmlinux.bin or vmlinuz.bin"
3182 With this option, the boot code will look for a device tree binary
3183 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3184 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3186 This is meant as a backward compatibility convenience for those
3187 systems with a bootloader that can't be upgraded to accommodate
3188 the documented boot protocol using a device tree.
3190 Beware that there is very little in terms of protection against
3191 this option being confused by leftover garbage in memory that might
3192 look like a DTB header after a reboot if no actual DTB is appended
3193 to vmlinux.bin. Do not leave this option active in a production kernel
3194 if you don't intend to always append a DTB.
3198 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3199 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3200 !MACH_LOONGSON64 && !MIPS_MALTA && \
3202 default MIPS_CMDLINE_FROM_BOOTLOADER
3204 config MIPS_CMDLINE_FROM_DTB
3206 bool "Dtb kernel arguments if available"
3208 config MIPS_CMDLINE_DTB_EXTEND
3210 bool "Extend dtb kernel arguments with bootloader arguments"
3212 config MIPS_CMDLINE_FROM_BOOTLOADER
3213 bool "Bootloader kernel arguments if available"
3215 config MIPS_CMDLINE_BUILTIN_EXTEND
3216 depends on CMDLINE_BOOL
3217 bool "Extend builtin kernel arguments with bootloader arguments"
3222 config LOCKDEP_SUPPORT
3226 config STACKTRACE_SUPPORT
3230 config PGTABLE_LEVELS
3232 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3233 default 3 if 64BIT && !PAGE_SIZE_64KB
3236 config MIPS_AUTO_PFN_OFFSET
3239 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3241 config PCI_DRIVERS_GENERIC
3242 select PCI_DOMAINS_GENERIC if PCI
3245 config PCI_DRIVERS_LEGACY
3246 def_bool !PCI_DRIVERS_GENERIC
3247 select NO_GENERIC_PCI_IOPORT_MAP
3248 select PCI_DOMAINS if PCI
3251 # ISA support is now enabled via select. Too many systems still have the one
3252 # or other ISA chip on the board that users don't know about so don't expect
3253 # users to choose the right thing ...
3259 bool "TURBOchannel support"
3260 depends on MACH_DECSTATION
3262 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3263 processors. TURBOchannel programming specifications are available
3265 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3267 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3268 Linux driver support status is documented at:
3269 <http://www.linux-mips.org/wiki/DECstation>
3275 config ARCH_MMAP_RND_BITS_MIN
3279 config ARCH_MMAP_RND_BITS_MAX
3283 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3286 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3293 select MIPS_EXTERNAL_TIMER
3306 config MIPS32_COMPAT
3312 config SYSVIPC_COMPAT
3316 bool "Kernel support for o32 binaries"
3318 select ARCH_WANT_OLD_COMPAT_IPC
3320 select MIPS32_COMPAT
3321 select SYSVIPC_COMPAT if SYSVIPC
3323 Select this option if you want to run o32 binaries. These are pure
3324 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3325 existing binaries are in this format.
3330 bool "Kernel support for n32 binaries"
3332 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3334 select MIPS32_COMPAT
3335 select SYSVIPC_COMPAT if SYSVIPC
3337 Select this option if you want to run n32 binaries. These are
3338 64-bit binaries using 32-bit quantities for addressing and certain
3339 data that would normally be 64-bit. They are used in special
3344 menu "Power management options"
3346 config ARCH_HIBERNATION_POSSIBLE
3348 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3350 config ARCH_SUSPEND_POSSIBLE
3352 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3354 source "kernel/power/Kconfig"
3358 config MIPS_EXTERNAL_TIMER
3361 menu "CPU Power Management"
3363 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3364 source "drivers/cpufreq/Kconfig"
3367 source "drivers/cpuidle/Kconfig"
3371 source "drivers/firmware/Kconfig"
3373 source "arch/mips/kvm/Kconfig"
3375 source "arch/mips/vdso/Kconfig"