2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm816.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/omap.h>
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
33 compatible = "arm,cortex-a8";
40 compatible = "arm,cortex-a8-pmu";
45 * The soc node represents the soc top level view. It is used for IPs
46 * that are not memory mapped in the MPU view or for the MPU itself.
49 compatible = "ti,omap-infra";
51 compatible = "ti,omap3-mpu";
57 * XXX: Use a flat representation of the dm816x interconnect.
58 * The real dm816x interconnect network is quite complex. Since
59 * it will not bring real advantage to represent that in DT
60 * for the moment, just use a fake OCP bus entry to represent
61 * the whole bus hierarchy.
64 compatible = "simple-bus";
65 reg = <0x44000000 0x10000>;
72 compatible = "ti,dm816-prcm", "simple-bus";
73 reg = <0x48180000 0x4000>;
76 ranges = <0 0x48180000 0x4000>;
83 prcm_clockdomains: clockdomains {
88 compatible = "ti,dm816-scrm", "simple-bus";
89 reg = <0x48140000 0x21000>;
93 ranges = <0 0x48140000 0x21000>;
95 dm816x_pinmux: pinmux@800 {
96 compatible = "pinctrl-single";
100 #pinctrl-cells = <1>;
101 pinctrl-single,register-width = <16>;
102 pinctrl-single,function-mask = <0xf>;
105 /* Device Configuration Registers */
106 scm_conf: syscon@600 {
107 compatible = "syscon", "simple-bus";
109 #address-cells = <1>;
111 ranges = <0 0x600 0x110>;
113 usb_phy0: usb-phy@20 {
114 compatible = "ti,dm8168-usb-phy";
117 clocks = <&main_fapll 6>;
118 clock-names = "refclk";
120 syscon = <&scm_conf>;
123 usb_phy1: usb-phy@28 {
124 compatible = "ti,dm8168-usb-phy";
127 clocks = <&main_fapll 6>;
128 clock-names = "refclk";
130 syscon = <&scm_conf>;
134 scrm_clocks: clocks {
135 #address-cells = <1>;
139 scrm_clockdomains: clockdomains {
143 target-module@49000000 {
144 compatible = "ti,sysc-omap4", "ti,sysc";
145 reg = <0x49000000 0x4>;
147 clocks = <&alwon_clkctrl DM816_TPCC_CLKCTRL 0>;
149 #address-cells = <1>;
151 ranges = <0x0 0x49000000 0x10000>;
154 compatible = "ti,edma3-tpcc";
156 reg-names = "edma3_cc";
157 interrupts = <12 13 14>;
158 interrupt-names = "edma3_ccint", "edma3_mperr",
163 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
164 <&edma_tptc2 3>, <&edma_tptc3 0>;
166 ti,edma-memcpy-channels = <20 21>;
170 target-module@49800000 {
171 compatible = "ti,sysc-omap4", "ti,sysc";
172 reg = <0x49800000 0x4>,
174 reg-names = "rev", "sysc";
175 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
176 ti,sysc-midle = <SYSC_IDLE_FORCE>;
177 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
179 clocks = <&alwon_clkctrl DM816_TPTC0_CLKCTRL 0>;
181 #address-cells = <1>;
183 ranges = <0x0 0x49800000 0x100000>;
186 compatible = "ti,edma3-tptc";
189 interrupt-names = "edma3_tcerrint";
193 target-module@49900000 {
194 compatible = "ti,sysc-omap4", "ti,sysc";
195 reg = <0x49900000 0x4>,
197 reg-names = "rev", "sysc";
198 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
199 ti,sysc-midle = <SYSC_IDLE_FORCE>;
200 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
202 clocks = <&alwon_clkctrl DM816_TPTC1_CLKCTRL 0>;
204 #address-cells = <1>;
206 ranges = <0x0 0x49900000 0x100000>;
209 compatible = "ti,edma3-tptc";
212 interrupt-names = "edma3_tcerrint";
216 target-module@49a00000 {
217 compatible = "ti,sysc-omap4", "ti,sysc";
218 reg = <0x49a00000 0x4>,
220 reg-names = "rev", "sysc";
221 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
222 ti,sysc-midle = <SYSC_IDLE_FORCE>;
223 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
225 clocks = <&alwon_clkctrl DM816_TPTC2_CLKCTRL 0>;
227 #address-cells = <1>;
229 ranges = <0x0 0x49a00000 0x100000>;
232 compatible = "ti,edma3-tptc";
235 interrupt-names = "edma3_tcerrint";
239 target-module@49b00000 {
240 compatible = "ti,sysc-omap4", "ti,sysc";
241 reg = <0x49b00000 0x4>,
243 reg-names = "rev", "sysc";
244 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
245 ti,sysc-midle = <SYSC_IDLE_FORCE>;
246 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
248 clocks = <&alwon_clkctrl DM816_TPTC3_CLKCTRL 0>;
250 #address-cells = <1>;
252 ranges = <0x0 0x49b00000 0x100000>;
255 compatible = "ti,edma3-tptc";
258 interrupt-names = "edma3_tcerrint";
263 compatible = "ti,am3352-elm";
265 reg = <0x48080000 0x2000>;
269 gpio1: gpio@48032000 {
270 compatible = "ti,omap4-gpio";
273 reg = <0x48032000 0x1000>;
277 interrupt-controller;
278 #interrupt-cells = <2>;
281 gpio2: gpio@4804c000 {
282 compatible = "ti,omap4-gpio";
285 reg = <0x4804c000 0x1000>;
289 interrupt-controller;
290 #interrupt-cells = <2>;
293 gpmc: gpmc@50000000 {
294 compatible = "ti,am3352-gpmc";
296 reg = <0x50000000 0x2000>;
297 #address-cells = <2>;
303 gpmc,num-waitpins = <2>;
304 interrupt-controller;
305 #interrupt-cells = <2>;
311 compatible = "ti,omap4-i2c";
313 reg = <0x48028000 0x1000>;
314 #address-cells = <1>;
317 dmas = <&edma 58 0 &edma 59 0>;
318 dma-names = "tx", "rx";
322 compatible = "ti,omap4-i2c";
324 reg = <0x4802a000 0x1000>;
325 #address-cells = <1>;
328 dmas = <&edma 60 0 &edma 61 0>;
329 dma-names = "tx", "rx";
332 intc: interrupt-controller@48200000 {
333 compatible = "ti,dm816-intc";
334 interrupt-controller;
335 #interrupt-cells = <1>;
336 reg = <0x48200000 0x1000>;
340 compatible = "ti,am3352-rtc", "ti,da830-rtc";
341 reg = <0x480c0000 0x1000>;
342 interrupts = <75 76>;
346 mailbox: mailbox@480c8000 {
347 compatible = "ti,omap4-mailbox";
348 reg = <0x480c8000 0x2000>;
350 ti,hwmods = "mailbox";
352 ti,mbox-num-users = <4>;
353 ti,mbox-num-fifos = <12>;
355 ti,mbox-tx = <3 0 0>;
356 ti,mbox-rx = <0 0 0>;
360 spinbox: spinbox@480ca000 {
361 compatible = "ti,omap4-hwspinlock";
362 reg = <0x480ca000 0x2000>;
363 ti,hwmods = "spinbox";
367 mdio: mdio@4a100800 {
368 compatible = "ti,davinci_mdio";
369 #address-cells = <1>;
371 reg = <0x4a100800 0x100>;
372 ti,hwmods = "davinci_mdio";
373 bus_freq = <1000000>;
374 phy0: ethernet-phy@0 {
377 phy1: ethernet-phy@1 {
382 eth0: ethernet@4a100000 {
383 compatible = "ti,dm816-emac";
385 reg = <0x4a100000 0x800
387 clocks = <&sysclk24_ck>;
388 syscon = <&scm_conf>;
389 ti,davinci-ctrl-reg-offset = <0>;
390 ti,davinci-ctrl-mod-reg-offset = <0x900>;
391 ti,davinci-ctrl-ram-offset = <0x2000>;
392 ti,davinci-ctrl-ram-size = <0x2000>;
393 interrupts = <40 41 42 43>;
394 phy-handle = <&phy0>;
397 eth1: ethernet@4a120000 {
398 compatible = "ti,dm816-emac";
400 reg = <0x4a120000 0x4000>;
401 clocks = <&sysclk24_ck>;
402 syscon = <&scm_conf>;
403 ti,davinci-ctrl-reg-offset = <0>;
404 ti,davinci-ctrl-mod-reg-offset = <0x900>;
405 ti,davinci-ctrl-ram-offset = <0x2000>;
406 ti,davinci-ctrl-ram-size = <0x2000>;
407 interrupts = <44 45 46 47>;
408 phy-handle = <&phy1>;
411 sata: sata@4a140000 {
412 compatible = "ti,dm816-ahci";
413 reg = <0x4a140000 0x10000>;
418 mcspi1: spi@48030000 {
419 compatible = "ti,omap4-mcspi";
420 reg = <0x48030000 0x1000>;
421 #address-cells = <1>;
425 ti,hwmods = "mcspi1";
426 dmas = <&edma 16 0 &edma 17 0
427 &edma 18 0 &edma 19 0
428 &edma 20 0 &edma 21 0
429 &edma 22 0 &edma 23 0>;
430 dma-names = "tx0", "rx0", "tx1", "rx1",
431 "tx2", "rx2", "tx3", "rx3";
435 compatible = "ti,omap4-hsmmc";
436 reg = <0x48060000 0x11000>;
439 dmas = <&edma 24 0 &edma 25 0>;
440 dma-names = "tx", "rx";
443 timer1_target: target-module@4802e000 {
444 compatible = "ti,sysc-omap4-timer", "ti,sysc";
445 reg = <0x4802e000 0x4>,
447 reg-names = "rev", "sysc";
448 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
449 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
452 <SYSC_IDLE_SMART_WKUP>;
453 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
455 #address-cells = <1>;
457 ranges = <0x0 0x4802e000 0x1000>;
460 compatible = "ti,dm816-timer";
464 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
469 timer2_target: target-module@48040000 {
470 compatible = "ti,sysc-omap4-timer", "ti,sysc";
471 reg = <0x48040000 0x4>,
473 reg-names = "rev", "sysc";
474 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
475 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
478 <SYSC_IDLE_SMART_WKUP>;
479 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
481 #address-cells = <1>;
483 ranges = <0x0 0x48040000 0x1000>;
486 compatible = "ti,dm816-timer";
489 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
494 timer3: timer@48042000 {
495 compatible = "ti,dm816-timer";
496 reg = <0x48042000 0x2000>;
498 ti,hwmods = "timer3";
501 timer4: timer@48044000 {
502 compatible = "ti,dm816-timer";
503 reg = <0x48044000 0x2000>;
505 ti,hwmods = "timer4";
509 timer5: timer@48046000 {
510 compatible = "ti,dm816-timer";
511 reg = <0x48046000 0x2000>;
513 ti,hwmods = "timer5";
517 timer6: timer@48048000 {
518 compatible = "ti,dm816-timer";
519 reg = <0x48048000 0x2000>;
521 ti,hwmods = "timer6";
525 timer7: timer@4804a000 {
526 compatible = "ti,dm816-timer";
527 reg = <0x4804a000 0x2000>;
529 ti,hwmods = "timer7";
533 uart1: uart@48020000 {
534 compatible = "ti,am3352-uart", "ti,omap3-uart";
536 reg = <0x48020000 0x2000>;
537 clock-frequency = <48000000>;
539 dmas = <&edma 26 0 &edma 27 0>;
540 dma-names = "tx", "rx";
543 uart2: uart@48022000 {
544 compatible = "ti,am3352-uart", "ti,omap3-uart";
546 reg = <0x48022000 0x2000>;
547 clock-frequency = <48000000>;
549 dmas = <&edma 28 0 &edma 29 0>;
550 dma-names = "tx", "rx";
553 uart3: uart@48024000 {
554 compatible = "ti,am3352-uart", "ti,omap3-uart";
556 reg = <0x48024000 0x2000>;
557 clock-frequency = <48000000>;
559 dmas = <&edma 30 0 &edma 31 0>;
560 dma-names = "tx", "rx";
563 /* NOTE: USB needs a transceiver driver for phys to work */
564 usb: usb_otg_hs@47401000 {
565 compatible = "ti,am33xx-usb";
566 reg = <0x47401000 0x400000>;
568 #address-cells = <1>;
570 ti,hwmods = "usb_otg_hs";
573 compatible = "ti,musb-dm816";
574 reg = <0x47401400 0x400
576 reg-names = "mc", "control";
578 interrupt-names = "mc";
580 interface-type = <0>;
582 phy-names = "usb2-phy";
583 mentor,multipoint = <1>;
584 mentor,num-eps = <16>;
585 mentor,ram-bits = <12>;
586 mentor,power = <500>;
588 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
589 &cppi41dma 2 0 &cppi41dma 3 0
590 &cppi41dma 4 0 &cppi41dma 5 0
591 &cppi41dma 6 0 &cppi41dma 7 0
592 &cppi41dma 8 0 &cppi41dma 9 0
593 &cppi41dma 10 0 &cppi41dma 11 0
594 &cppi41dma 12 0 &cppi41dma 13 0
595 &cppi41dma 14 0 &cppi41dma 0 1
596 &cppi41dma 1 1 &cppi41dma 2 1
597 &cppi41dma 3 1 &cppi41dma 4 1
598 &cppi41dma 5 1 &cppi41dma 6 1
599 &cppi41dma 7 1 &cppi41dma 8 1
600 &cppi41dma 9 1 &cppi41dma 10 1
601 &cppi41dma 11 1 &cppi41dma 12 1
602 &cppi41dma 13 1 &cppi41dma 14 1>;
604 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
605 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
607 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
608 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
613 compatible = "ti,musb-dm816";
614 reg = <0x47401c00 0x400
616 reg-names = "mc", "control";
618 interrupt-names = "mc";
620 interface-type = <0>;
622 phy-names = "usb2-phy";
623 mentor,multipoint = <1>;
624 mentor,num-eps = <16>;
625 mentor,ram-bits = <12>;
626 mentor,power = <500>;
628 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
629 &cppi41dma 17 0 &cppi41dma 18 0
630 &cppi41dma 19 0 &cppi41dma 20 0
631 &cppi41dma 21 0 &cppi41dma 22 0
632 &cppi41dma 23 0 &cppi41dma 24 0
633 &cppi41dma 25 0 &cppi41dma 26 0
634 &cppi41dma 27 0 &cppi41dma 28 0
635 &cppi41dma 29 0 &cppi41dma 15 1
636 &cppi41dma 16 1 &cppi41dma 17 1
637 &cppi41dma 18 1 &cppi41dma 19 1
638 &cppi41dma 20 1 &cppi41dma 21 1
639 &cppi41dma 22 1 &cppi41dma 23 1
640 &cppi41dma 24 1 &cppi41dma 25 1
641 &cppi41dma 26 1 &cppi41dma 27 1
642 &cppi41dma 28 1 &cppi41dma 29 1>;
644 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
645 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
647 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
648 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
652 cppi41dma: dma-controller@47402000 {
653 compatible = "ti,am3359-cppi41";
654 reg = <0x47400000 0x1000
658 reg-names = "glue", "controller", "scheduler", "queuemgr";
660 interrupt-names = "glue";
662 #dma-channels = <30>;
663 #dma-requests = <256>;
667 wd_timer2: wd_timer@480c2000 {
668 compatible = "ti,omap3-wdt";
669 ti,hwmods = "wd_timer";
670 reg = <0x480c2000 0x1000>;
676 #include "dm816x-clocks.dtsi"
678 /* Preferred always-on timer for clocksource */
683 assigned-clocks = <&timer1_fck>;
684 assigned-clock-parents = <&sys_clkin_ck>;
688 /* Preferred timer for clockevent */
693 assigned-clocks = <&timer2_fck>;
694 assigned-clock-parents = <&sys_clkin_ck>;