projects / linux-2.6-microblaze.git / search
| 2020-11-09 | Ard Biesheuvel | arm64: mm: extend linear region for 52-bit VA configurations Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-10-06 | Jeremy Linton | crypto: arm64: Use x16 with indirect branch to bti_c Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-30 | Ard Biesheuvel | arm64: permit ACPI core to map kernel memory used for... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-17 | Andrew Jones | arm64: paravirt: Initialize steal time when cpu is... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-17 | Ilias Apalodimas | arm64: bpf: Fix branch offset in JIT Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-13 | Marc Zyngier | arm64: Allow CPUs unffected by ARM erratum 1418040... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Vincenzo Frascino | arm64: mte: Add Memory Tagging Extension documentation Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Vincenzo Frascino | arm64: mte: Kconfig entry Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Steven Price | arm64: mte: Save tags when hibernating Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Steven Price | arm64: mte: Enable swap of tagged pages [catalin.marinas@arm.com: move function prototypes to... [catalin.marinas@arm.com: drop '_tags' from arch_swap_restore_... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Steven Price | mm: Add arch hooks for saving/restoring tags [catalin.marinas@arm.com: add unlock_page() on the error... [catalin.marinas@arm.com: dropped the _tags suffix] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | fs: Handle intra-page faults in copy_mount_options() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Allow {set,get}_tagged_addr_ctrl() on non... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Restore the GCR_EL1 register after a suspend Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Allow user control of the generated random... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Allow user control of the tag check mode... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Validate the PROT_MTE request via arch_validate_... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | mm: Introduce arch_validate_flags() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Add PROT_MTE support to mmap() and mprotect() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Kevin Brodsky | mm: Introduce arch_calc_vm_flag_bits() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Tags-aware aware memcmp_pages() implementation Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: Avoid unnecessary clear_user_page() indirection Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Vincenzo Frascino | arm64: mte: Tags-aware copy_{user_,}highpage() implementations Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: mte: Clear the tags when a page is mapped in... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | mm: Preserve the PG_arch_2 flag in __split_huge_page_tail() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Steven Price | mm: Add PG_arch_2 page flag [catalin.marinas@arm.com: use CONFIG_64BIT for guarding... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Vincenzo Frascino | arm64: mte: Handle synchronous and asynchronous tag... Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Vincenzo Frascino | arm64: mte: Add specific SIGSEGV codes [catalin.marinas@arm.com: renamed precise/imprecise to... [catalin.marinas@arm.com: dropped #ifdef __aarch64__... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-04 | Catalin Marinas | arm64: kvm: mte: Hide the MTE CPUID information from... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-03 | Vincenzo Frascino | arm64: mte: CPU feature detection and initial sysreg... Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-03 | Catalin Marinas | arm64: mte: Use Normal Tagged attributes for the linear map Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-03 | Vincenzo Frascino | arm64: mte: system register definitions Co-developed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-02 | Jessica Yu | arm64/module: set trampoline section flags regardless... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-09-02 | Sudeep Holla | arm64: Remove exporting cpu_logical_map symbol Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-28 | James Morse | KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-28 | James Morse | KVM: arm64: Survive synchronous exceptions caused by... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-28 | James Morse | KVM: arm64: Add kvm_extable for vaxorcism code Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-28 | Frank van der Linden | arm64: vdso32: make vdso32 install conditional Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-28 | Sami Tolvanen | arm64: use a common .arch preamble for inline assembly Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-21 | Stephen Boyd | ARM64: vdso32: Install vdso32 from vdso_install Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-21 | Rob Herring | KVM: arm64: Print warning when cpu erratum can cause... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-21 | Marc Zyngier | arm64: Allow booting of late CPUs affected by erratum... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-21 | Marc Zyngier | arm64: Move handling of erratum 1418040 into C code Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-10 | Christophe Leroy | recordmcount: Fix build failure on non arm64 Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-08 | Kefeng Wang | arm64: Fix __cpu_logical_map undefined issue Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-08-08 | Pingfan Liu | arm64/fixmap: make notes of fixed_addresses more precisely Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-31 | Catalin Marinas | Merge branch 'for-next/read-barrier-depends' into for... |
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| 2020-07-31 | Catalin Marinas | Merge branch 'for-next/tlbi' into for-next/core |
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| 2020-07-31 | Catalin Marinas | Merge branches 'for-next/misc', 'for-next/vmcoreinfo... |
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| 2020-07-31 | Maninder Singh | arm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-30 | Pingfan Liu | arm64/mm: save memory access in check_and_switch_context... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-30 | Randy Dunlap | arm64: sigcontext.h: delete duplicated word Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-30 | Randy Dunlap | arm64: ptrace.h: delete duplicated word Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-30 | Randy Dunlap | arm64: pgtable-hwdef.h: delete duplicated words Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Makarand Pawagi | bus: fsl-mc: Add ACPI support for fsl-mc Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Diana Craciun | bus/fsl-mc: Refactor the MSI domain creation in the... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | of/irq: Make of_msi_map_rid() PCI bus agnostic Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Diana Craciun | of/irq: make of_msi_map_get_device_domain() bus agnostic Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Laurentiu Tudor | dt-bindings: arm: fsl: Add msi-map device-tree binding... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | of/device: Add input id to of_dma_configure() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | of/iommu: Make of_map_rid() PCI agnostic Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | ACPI/IORT: Add an input ID to acpi_dma_configure() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | ACPI/IORT: Remove useless PCI bus walk Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | ACPI/IORT: Make iort_msi_map_rid() PCI agnostic Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | ACPI/IORT: Make iort_get_device_domain IRQ domain agnostic Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-28 | Lorenzo Pieralisi | ACPI/IORT: Make iort_match_node_callback walk the ACPI... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64: enable time namespace support Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64/vdso: Restrict splitting VVAR VMA Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64/vdso: Handle faults on timens page Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64/vdso: Add time namespace page Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64/vdso: Zap vvar pages when switching to a time... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Andrei Vagin | arm64/vdso: use the fault callback to map vvar pages Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Gregory Herrero | recordmcount: only record relocation of type R_AARCH64_CALL2... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-24 | Catalin Marinas | arm64: Reserve HWCAP2_MTE as (1 << 18) Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-23 | Ard Biesheuvel | arm64/entry: deduplicate SW PAN entry/exit routines Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-22 | Vladimir Murzin | arm64: s/AMEVTYPE/AMEVTYPER Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-15 | Zhenyu Ye | arm64: tlb: Use the TLBI RANGE feature in arm64 [catalin.marinas@arm.com: removed unnecessary masks in... [catalin.marinas@arm.com: __TLB_RANGE_NUM subtracts 1] [catalin.marinas@arm.com: minor adjustments to the comments] [catalin.marinas@arm.com: introduce system_supports_tlb_range()] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-15 | Zhenyu Ye | arm64: enable tlbi range instructions Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-15 | Zhenyu Ye | arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature [catalin.marinas@arm.com: some renaming for consistency] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-15 | Anshuman Khandual | arm64/hugetlb: Reserve CMA areas for gigantic pages... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-14 | Mark Brown | arm64: stacktrace: Move export for save_stack_trace_tsk() Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-14 | Ard Biesheuvel | arm64/acpi: disallow writeable AML opregion mapping... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-14 | Ard Biesheuvel | arm64/acpi: disallow AML memory opregions to access... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-10 | Zhenyu Ye | arm64: tlb: don't set the ttl value in flush_tlb_page_nosync Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Anshuman Khandual | arm64/cpufeature: Validate feature bits spacing in... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Catalin Marinas | arm64: Shift the __tlbi_level() indentation left Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Zhenyu Ye | arm64: tlb: Set the TTL field in flush_*_tlb_range Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Zhenyu Ye | arm64: tlb: Set the TTL field in flush_tlb_range Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Peter Zijlstra ... | tlb: mmu_gather: add tlb_flush_*_range APIs Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Zhenyu Ye | arm64: Add tlbi_user_level TLB invalidation helper Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-07 | Andrew Scull | smccc: Make constants available to assembly Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Gavin Shan | arm64/mm: Redefine CONT_{PTE, PMD}_SHIFT Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Bhupesh Sharma | arm64/defconfig: Enable CONFIG_KEXEC_FILE Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Anshuman Khandual | arm64/cpufeature: Replace all open bits shift encodings... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Anshuman Khandual | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Anshuman Khandual | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| 2020-07-03 | Anshuman Khandual | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0... Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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