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mm: Remove examples from enum zone_type comment
2020-11-20 Nicolas Saenz Juliennemm: Remove examples from enum zone_type comment
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Ard Biesheuvelarm64: mm: Set ZONE_DMA size based on early IORT scan
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Nicolas Saenz Juliennearm64: mm: Set ZONE_DMA size based on devicetree's...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Nicolas Saenz Julienneof: unittest: Add test for of_dma_get_max_cpu_address()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Nicolas Saenz Julienneof/address: Introduce of_dma_get_max_cpu_address()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Nicolas Saenz Juliennearm64: mm: Move zone_dma_bits initialization into zone_sizes...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Nicolas Saenz Juliennearm64: mm: Move reserve_crashkernel() into mem_init()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-20 Catalin Marinasarm64: Force NO_BLOCK_MAPPINGS if crashkernel reservation...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-11-19 Catalin Marinasarm64: Ignore any DMA offsets in the max_zone_phys...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-10-06 Jeremy Lintoncrypto: arm64: Use x16 with indirect branch to bti_c
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-30 Ard Biesheuvelarm64: permit ACPI core to map kernel memory used for...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-17 Andrew Jonesarm64: paravirt: Initialize steal time when cpu is...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-17 Ilias Apalodimasarm64: bpf: Fix branch offset in JIT
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-13 Marc Zyngierarm64: Allow CPUs unffected by ARM erratum 1418040...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Vincenzo Frascinoarm64: mte: Add Memory Tagging Extension documentation
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Vincenzo Frascinoarm64: mte: Kconfig entry
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Steven Pricearm64: mte: Save tags when hibernating
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Steven Pricearm64: mte: Enable swap of tagged pages
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Steven Pricemm: Add arch hooks for saving/restoring tags
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasfs: Handle intra-page faults in copy_mount_options()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Allow {set,get}_tagged_addr_ctrl() on non...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Restore the GCR_EL1 register after a suspend
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Allow user control of the generated random...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Allow user control of the tag check mode...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasmm: Allow arm64 mmap(PROT_MTE) on RAM-based files
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Validate the PROT_MTE request via arch_validate_...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasmm: Introduce arch_validate_flags()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Add PROT_MTE support to mmap() and mprotect()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Kevin Brodskymm: Introduce arch_calc_vm_flag_bits()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Tags-aware aware memcmp_pages() implementation
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: Avoid unnecessary clear_user_page() indirection
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Vincenzo Frascinoarm64: mte: Tags-aware copy_{user_,}highpage() implementations
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: mte: Clear the tags when a page is mapped in...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasmm: Preserve the PG_arch_2 flag in __split_huge_page_tail()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Steven Pricemm: Add PG_arch_2 page flag
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Vincenzo Frascinoarm64: mte: Handle synchronous and asynchronous tag...
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Vincenzo Frascinoarm64: mte: Add specific SIGSEGV codes
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-04 Catalin Marinasarm64: kvm: mte: Hide the MTE CPUID information from...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-03 Vincenzo Frascinoarm64: mte: CPU feature detection and initial sysreg...
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-03 Catalin Marinasarm64: mte: Use Normal Tagged attributes for the linear map
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-03 Vincenzo Frascinoarm64: mte: system register definitions
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-02 Jessica Yuarm64/module: set trampoline section flags regardless...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-09-02 Sudeep Hollaarm64: Remove exporting cpu_logical_map symbol
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-28 James MorseKVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-28 James MorseKVM: arm64: Survive synchronous exceptions caused by...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-28 James MorseKVM: arm64: Add kvm_extable for vaxorcism code
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-28 Frank van der Lindenarm64: vdso32: make vdso32 install conditional
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-28 Sami Tolvanenarm64: use a common .arch preamble for inline assembly
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-21 Stephen BoydARM64: vdso32: Install vdso32 from vdso_install
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-21 Rob HerringKVM: arm64: Print warning when cpu erratum can cause...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-21 Marc Zyngierarm64: Allow booting of late CPUs affected by erratum...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-21 Marc Zyngierarm64: Move handling of erratum 1418040 into C code
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-10 Christophe Leroyrecordmcount: Fix build failure on non arm64
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-08 Kefeng Wangarm64: Fix __cpu_logical_map undefined issue
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-08-08 Pingfan Liuarm64/fixmap: make notes of fixed_addresses more precisely
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-31 Catalin MarinasMerge branch 'for-next/read-barrier-depends' into for...
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2020-07-31 Catalin MarinasMerge branch 'for-next/tlbi' into for-next/core
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2020-07-31 Catalin MarinasMerge branches 'for-next/misc', 'for-next/vmcoreinfo...
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2020-07-31 Maninder Singharm64: use IRQ_STACK_SIZE instead of THREAD_SIZE for...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-30 Pingfan Liuarm64/mm: save memory access in check_and_switch_context...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-30 Randy Dunlaparm64: sigcontext.h: delete duplicated word
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-30 Randy Dunlaparm64: ptrace.h: delete duplicated word
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-30 Randy Dunlaparm64: pgtable-hwdef.h: delete duplicated words
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Makarand Pawagibus: fsl-mc: Add ACPI support for fsl-mc
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Diana Craciunbus/fsl-mc: Refactor the MSI domain creation in the...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo Pieralisiof/irq: Make of_msi_map_rid() PCI bus agnostic
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Diana Craciunof/irq: make of_msi_map_get_device_domain() bus agnostic
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Laurentiu Tudordt-bindings: arm: fsl: Add msi-map device-tree binding...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo Pieralisiof/device: Add input id to of_dma_configure()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo Pieralisiof/iommu: Make of_map_rid() PCI agnostic
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo PieralisiACPI/IORT: Add an input ID to acpi_dma_configure()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo PieralisiACPI/IORT: Remove useless PCI bus walk
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo PieralisiACPI/IORT: Make iort_msi_map_rid() PCI agnostic
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo PieralisiACPI/IORT: Make iort_get_device_domain IRQ domain agnostic
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-28 Lorenzo PieralisiACPI/IORT: Make iort_match_node_callback walk the ACPI...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64: enable time namespace support
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64/vdso: Restrict splitting VVAR VMA
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64/vdso: Handle faults on timens page
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64/vdso: Add time namespace page
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64/vdso: Zap vvar pages when switching to a time...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Andrei Vaginarm64/vdso: use the fault callback to map vvar pages
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Gregory Herrerorecordmcount: only record relocation of type R_AARCH64_CALL2...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-24 Catalin Marinasarm64: Reserve HWCAP2_MTE as (1 << 18)
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-23 Ard Biesheuvelarm64/entry: deduplicate SW PAN entry/exit routines
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-22 Vladimir Murzinarm64: s/AMEVTYPE/AMEVTYPER
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-15 Zhenyu Yearm64: tlb: Use the TLBI RANGE feature in arm64
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-15 Zhenyu Yearm64: enable tlbi range instructions
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-15 Zhenyu Yearm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-15 Anshuman Khandualarm64/hugetlb: Reserve CMA areas for gigantic pages...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-14 Mark Brownarm64: stacktrace: Move export for save_stack_trace_tsk()
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-14 Ard Biesheuvelarm64/acpi: disallow writeable AML opregion mapping...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-14 Ard Biesheuvelarm64/acpi: disallow AML memory opregions to access...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-10 Zhenyu Yearm64: tlb: don't set the ttl value in flush_tlb_page_nosync
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-07 Anshuman Khandualarm64/cpufeature: Validate feature bits spacing in...
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-07 Catalin Marinasarm64: Shift the __tlbi_level() indentation left
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-07 Zhenyu Yearm64: tlb: Set the TTL field in flush_*_tlb_range
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-07 Zhenyu Yearm64: tlb: Set the TTL field in flush_tlb_range
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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2020-07-07 Peter Zijlstra ... tlb: mmu_gather: add tlb_flush_*_range APIs
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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