RDMA/hns: Add support for CQ stash
authorLang Cheng <chenglang@huawei.com>
Thu, 26 Nov 2020 07:04:10 +0000 (15:04 +0800)
committerJason Gunthorpe <jgg@nvidia.com>
Fri, 27 Nov 2020 16:53:59 +0000 (12:53 -0400)
commitbfefae9f108dfa62eb9c16c9e97086fddb4ece04
treee49ddb7f3444dff50e584912fec8bf024174506f
parent71586dd2001087e89e344e2c7dcee6b4a53bb6de
RDMA/hns: Add support for CQ stash

Stash is a mechanism that uses the core information carried by the ARM AXI
bus to access the L3 cache. It can be used to improve the performance by
increasing the hit ratio of L3 cache. CQs need to enable stash by default.

Link: https://lore.kernel.org/r/1606374251-21512-2-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/hns/hns_roce_common.h
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
drivers/infiniband/hw/hns/hns_roce_hw_v2.h