x86/cpufeatures: Add Architectural LBRs feature bit
authorKan Liang <kan.liang@linux.intel.com>
Fri, 3 Jul 2020 12:49:07 +0000 (05:49 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 8 Jul 2020 09:38:51 +0000 (11:38 +0200)
commitbd657aa3dd8514e62486ce7f90b5e484c18d684d
treeee416e22027b77d7ce2b63e3d3332ba3c141b954
parent78c2141b654375079e3737f06f19cabfc0fcecd7
x86/cpufeatures: Add Architectural LBRs feature bit

CPUID.(EAX=07H, ECX=0):EDX[19] indicates whether an Intel CPU supports
Architectural LBRs.

The "X86_FEATURE_..., word 18" is already mirrored from CPUID
"0x00000007:0 (EDX)". Add X86_FEATURE_ARCH_LBR under the "word 18"
section.

The feature will appear as "arch_lbr" in /proc/cpuinfo.

The Architectural Last Branch Records (LBR) feature enables recording
of software path history by logging taken branches and other control
flows. The feature will be supported in the perf_events subsystem.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
Link: https://lkml.kernel.org/r/1593780569-62993-2-git-send-email-kan.liang@linux.intel.com
arch/x86/include/asm/cpufeatures.h