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clk: stm32f4: Add post divisor for I2S & SAI PLLs
authorGabriel Fernandez <gabriel.fernandez@st.com>
Tue, 13 Dec 2016 14:20:14 +0000 (15:20 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 22 Dec 2016 00:09:09 +0000 (16:09 -0800)
commit517633ef630eba33950abd600dfab6c573d3cc22
tree9c5f3f47cb59a5a2a7b3db97bb31a15814c440f0tree | snapshot
parent83135ad3c517f2b4b59321886efe19e6c6cff54acommit | diff
clk: stm32f4: Add post divisor for I2S & SAI PLLs

This patch adds post dividers of I2S & SAI PLLs.
These dividers are managed by a dedicated register (RCC_DCKCFGR).
The PLL should be off before a set rate.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk-stm32f4.c diff | blob | history
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