Arnd Bergmann [Fri, 8 Jul 2022 11:40:17 +0000 (13:40 +0200)]
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.20 (take two)
- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
development board,
- AA1024XD12 panel overlay support for the Draak, Ebisu, and
Salvator-X(S) development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
ARM: dts: r9a06g032-rzn1d400-db: Add switch description
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
ARM: dts: r9a06g032: Describe switch
ARM: dts: r9a06g032: Describe GMAC2
ARM: dts: r9a06g032: Describe MII converter
arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
ARM: dts: renesas: Fix DA9063 watchdog subnode names
arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz
Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 8 Jul 2022 07:40:30 +0000 (09:40 +0200)]
Merge tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/dt
arm64: dts: ZynqMP DT changes for v5.20
- Extend gpio-zynq DT binding (compatible, power-domains, gpio-line-names)
- Fix sm-k26 gpio comment
- Wire AMS device
- Align gpio-keys node names with dtschema
* tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
arm64: dts: xilinx: align gpio-key node names with dtschema
arm64: dts: zynqmp: add AMS driver to device tree
dt-bindings: gpio: zynq: Describe gpio-line-names
arm64: zynqmp: Fix comment about number of gpio line names
dt-bindings: gpio: zynq: Add power-domains
dt-bindings: gpio: zynq: Add missing compatible strings
Link: https://lore.kernel.org/r/452e8c68-b63b-f4f6-a937-67f65c64a8a0@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 8 Jul 2022 07:38:50 +0000 (09:38 +0200)]
Merge tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx into arm/dt
ARM: Zynq DT changes for v5.20
- Align gpio-keys node names with dtschema
* tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: xilinx: align gpio-key node names with dtschema
Link: https://lore.kernel.org/r/87d2bd4a-b90d-6396-17c5-c95ac64d17d0@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Laurent Pinchart [Wed, 29 Dec 2021 19:31:35 +0000 (21:31 +0200)]
arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
The Draak and Ebisu boards support an optional LVDS panel. One
compatible panel is the Mitsubishi AA104XD12. Add a corresponding DT
overlay.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211229193135.28767-4-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Laurent Pinchart [Wed, 29 Dec 2021 19:31:34 +0000 (21:31 +0200)]
arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
The Salvator-X and Salvator-XS boards support an optional LVDS panel.
One compatible panel is the Mitsubishi AA104XD12. Add a corresponding DT
overlay.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211229193135.28767-3-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Laurent Pinchart [Wed, 29 Dec 2021 19:31:33 +0000 (21:31 +0200)]
arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
The Mitsubishi AA1024XD12 panel can be used for R-Car Gen2 and Gen3
boards as an optional external panel. It is described in the
arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi file as a direct child of the
DT root node. This allows including r8a77xx-aa104xd12-panel.dtsi in
board device trees, with other minor modifications, to enable the panel.
This is however not how external components should be modelled. Instead
of modifying the board device tree to enable the panel, it should be
compiled as a DT overlay, to be loaded by the boot loader.
Prepare the r8a77xx-aa104xd12-panel.dtsi file for this usage by
declaring a panel node only, without hardcoding its path. Overlay
sources can then include r8a77xx-aa104xd12-panel.dtsi where appropriate.
This change doesn't cause any regression as r8a77xx-aa104xd12-panel.dtsi
is currently unused. As overlay support for this panel has only been
tested with Gen3 hardware, and Gen2 support will require more
development, move the file to arch/arm64/boot/dts/renesas/.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211229193135.28767-2-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Arnd Bergmann [Thu, 7 Jul 2022 08:22:49 +0000 (10:22 +0200)]
Merge tag 'samsung-dt64-5.20-2' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.20, part two
1. Correct SPI11 pin names on ExynosAutov9.
2. Add more USI (I2C/SPI/UART) devices to ExynosAutov9.
* tag 'samsung-dt64-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynosautov9: add usi device tree nodes
arm64: dts: exynosautov9: prepare usi0 changes
arm64: dts: exynosautov9: add pdma0 device tree node
dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible
arm64: dts: exynosautov9: correct spi11 pin names
Link: https://lore.kernel.org/r/20220707080408.69251-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 7 Jul 2022 08:21:24 +0000 (10:21 +0200)]
Merge tag 'samsung-dt-5.20-2' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.20, part two
1. Cleanups: align SDHCI node names.
2. DT bindings: Document preferred compatible naming schema.
3. DT bindings: fixes and improvements to Exynos PMU bindings.
* tag 'samsung-dt-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: exynos-pmu: add reboot-mode
dt-bindings: soc: samsung: exynos-pmu: use abolute ref paths
dt-bindings: soc: samsung: exynos-pmu: cleanup assigned clocks
dt-bindings: samsung: document preferred compatible naming
ARM: dts: s5pv210: align SDHCI node name with dtschema
ARM: dts: s3c64xx: align SDHCI node name with dtschema
ARM: dts: s3c24xx: align SDHCI node name with dtschema
ARM: dts: exynos: align SDHCI node name with dtschema
Link: https://lore.kernel.org/r/20220707080408.69251-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 20:34:02 +0000 (22:34 +0200)]
Merge tag 'dt-cleanup-5.20-2' of git://git./linux/kernel/git/krzk/linux into arm/dt
Cleanup of ARM DTS for v5.20, part two
Series of cleanups for ARM DTS - white-spaces, gpio-key subnode names
and gpio-key properties for more boards: TI, Marvell, AT91 and Aspeed.
* tag 'dt-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: aspeed: correct gpio-keys properties
ARM: dts: aspeed: align gpio-key node names with dtschema
ARM: dts: at91: drop unneeded status from gpio-keys
ARM: dts: at91: correct gpio-keys properties
ARM: dts: at91: align gpio-key node names with dtschema
ARM: dts: omap: correct gpio-keys properties
ARM: dts: omap: align gpio-key node names with dtschema
ARM: dts: marvell: correct gpio-keys properties
ARM: dts: marvell: align gpio-key node names with dtschema
ARM: dts: omap: adjust whitespace around '='
ARM: dts: ti: adjust whitespace around '='
Link: https://lore.kernel.org/r/20220706163754.33064-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 20:32:51 +0000 (22:32 +0200)]
Merge tag 'dt64-cleanup-5.20-2' of git://git./linux/kernel/git/krzk/linux into arm/dt
Cleanup of ARM64 DTS for v5.20, part two
Remaining cleanups for ARM64 DTS: gpio-keys and led node names on Marvel
platforms.
* tag 'dt64-cleanup-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: marvell: armada-3720: align lednode names with dtschema
arm64: dts: marvell: align gpio-key node names with dtschema
Link: https://lore.kernel.org/r/20220706163754.33064-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:57 +0000 (18:02 +0200)]
dt-bindings: soc: samsung: exynos-pmu: add reboot-mode
ExynosAutov9 gained a reboot-mode node, so document the property to fix
warning:
exynosautov9-sadk.dtb: system-controller@
10460000: 'reboot-mode' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:56 +0000 (18:02 +0200)]
dt-bindings: soc: samsung: exynos-pmu: use abolute ref paths
Preferred coding for referencing other schemas is to use absolute path.
Quotes over path are also not needed.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 6 Jul 2022 16:02:55 +0000 (18:02 +0200)]
dt-bindings: soc: samsung: exynos-pmu: cleanup assigned clocks
"assigned-clocks" are not needed in the device schema as they come from
core schema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220706160257.27579-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 5 Jul 2022 16:13:40 +0000 (18:13 +0200)]
dt-bindings: samsung: document preferred compatible naming
Compatibles can come in two formats. Either "vendor,ip-soc" or
"vendor,soc-ip". Add a DT schema documenting preferred policy and
enforcing it for all new compatibles, except few existing patterns. The
schema also disallows wild-cards used in SoC compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220705161340.493474-1-krzysztof.kozlowski@linaro.org
Arnd Bergmann [Wed, 6 Jul 2022 11:55:01 +0000 (13:55 +0200)]
Merge tag 'juno-updates-5.20' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt
Armv8 Juno/FVP updates for v5.20
Just a small bunch of miscellaneous updates: addition of missing
cache-level property to L2 caches on Juno, whitespace adjustments
and removal of erroneous 'mbox-name' and 'panel-dpi' compatible in
the device tree nodes.
* tag 'juno-updates-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Add cache-level property to L2 caches
arm64: dts: arm: adjust whitespace around '='
arm64: dts: arm/juno: Drop erroneous 'mbox-name' property
arm64: dts: arm/fvp-base-revc: Remove 'panel-dpi' compatible
Link: https://lore.kernel.org/r/20220706115026.2272643-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 11:46:26 +0000 (13:46 +0200)]
Merge tag 'stm32-dt-for-v5.20-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.20, round 1
Highlights:
----------
- MCU:
-Fix whitespace coding style. No functional changes.
- MPU:
- General:
- Remove specific IPCC wakeup interrupt on STM32MP15.
- Enable OPTEE firmware and scmi support (clock/reset) on
STM32MP13. It allows to enable RCC clock driver.
- Add new pins configurations groups.
- DH boards:
- Add DHCOR based DRC Compact board. It embeds: 2xETH, 1xCAN,
uSD, USB, eMMC and SDIO wifi.
- Add ST MIPID02 bindings to AV96 (not enabled by default)
- OSD32:
- Correct vcc-supply for eeprom.
- fix missing internally connected voltage regulator (ldo3
supplied by vdd_ddr).
* tag 'stm32-dt-for-v5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
ARM: dts: stm32: Add ST MIPID02 bindings to AV96
ARM: dts: stm32: Add alternate pinmux for RCC pin
ARM: dts: stm32: Add alternate pinmux for DCMI pins
ARM: dts: stm32: Add DHCOR based DRC Compact board
ARM: dts: stm32: Add alternate pinmux for UART5 pins
ARM: dts: stm32: Add alternate pinmux for UART4 pins
ARM: dts: stm32: Add alternate pinmux for UART3 pins
ARM: dts: stm32: Add alternate pinmux for SPI2 pins
ARM: dts: stm32: Add alternate pinmux for CAN1 pins
dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact
ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15
ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk
ARM: dts: stm32: add RCC on STM32MP13x SoC family
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13
dt-bindings: rcc: stm32: select the "secure" path for stm32mp13
ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32
ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1
ARM: dts: stm32: adjust whitespace around '=' on MCU boards
ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI
ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
...
Link: https://lore.kernel.org/r/a250f32b-f67c-2922-0748-e39dc791e95c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 11:42:46 +0000 (13:42 +0200)]
Merge tag 'at91-dt-5.20' of git://git./linux/kernel/git/at91/linux into arm/dt
AT91 DT for v5.20
It contains:
- compilation warning fixes for SAMA5D2
- updates for all AT91 device tree to use generic name for reset
controller
- reset controller node for SAMA7G5
- MCAN1 and UDPHS nodes for LAN966 SoCs
- Flexcom3 bindings were updated for lan966x-pcb8291.dts board to cope
with reality
* tag 'at91-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: Add UDPHS support
dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
ARM: dts: lan966x: Add mcan1 node.
ARM: dts: at91: sama7g5: add reset-controller node
ARM: dts: at91: use generic name for reset controller
ARM: dts: at91: sama5d2: fix compilation warning
ARM: dts: at91: sama5d2: fix compilation warning
Link: https://lore.kernel.org/r/20220705084637.818216-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 11:41:57 +0000 (13:41 +0200)]
Merge tag 'ux500-dts-v5.20' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.20 kernel:
- Fix orientation matrices on a few U8500 mobile phones.
- Drop unused i2c power supply handled by the power domain.
* tag 'ux500-dts-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Drop unused i2c power domain supply
ARM: dts: ux500: Fix Gavini accelerometer mounting matrix
ARM: dts: ux500: Fix Codina accelerometer mounting matrix
ARM: dts: ux500: Fix Janice accelerometer mounting matrix
Link: https://lore.kernel.org/r/CACRpkdY1MG=HG+tOCmD1_LEAStV1-ycCLkwShMRD4R=4jGDYHQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 11:40:10 +0000 (13:40 +0200)]
Merge tag 'v5.20-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
NFC flash node on rk3066a-mk808 and some dts styling fixes
(alignment and node names).
* tag 'v5.20-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: correct gpio-keys properties on rk3288-tinker
ARM: dts: rockchip: align gpio-key node names with dtschema
ARM: dts: rockchip: adjust whitespace around '='
ARM: dts: rockchip: enable nfc node in rk3066a-mk808.dts
Link: https://lore.kernel.org/r/14795241.VsHLxoZxqI@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 6 Jul 2022 11:37:33 +0000 (13:37 +0200)]
Merge tag 'v5.20-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
New board the Radxa Rock Pi S, enablement of graphics support and hdmi-audio
on rk356x in general plus necessary board-specific changes on Rock-3A,
Quartz64-A, rk3568-evb, BPI-R2-Pro.
A number of additional peripherals on BPI-R2-Pro (gpu, thermal, rtc) and
PCIe2x1 support on rk3568 and enablement on Quart64-A as well as a number
of additional peripherals to this board (sfc node, sdr-104 support, fan).
And finally touch panel support for rockpro64 and some misc dt cleanups
(node names for dtschema and styling).
* tag 'v5.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (27 commits)
arm64: dts: rockchip: enable hdmi tx audio on rock-3a
arm64: dts: rockchip: enable hdmi tx audio on rk3568-evb1-v10
arm64: dts: rockchip: align gpio-key node names with dtschema
arm64: dts: rockchip: rock-pi-s add more peripherals
arm64: dts: rockchip: add ROCK Pi S DTS support
dt-bindings: arm: rockchip: Add Radxa ROCK Pi S
arm64: dts: rockchip: Add missing space around regulator-name on rk3368-orion-r68
arm64: dts: rockchip: enable the gpu on BPI-R2-Pro
arm64: dts: rockchip: configure thermal shutdown for BPI-R2-Pro
arm64: dts: rockchip: Enable HDMI audio on BPI R2 Pro
arm64: dts: rockchip: enable vop2 and hdmi tx on BPI-R2-Pro
arm64: dts: rockchip: set display regulators to always-on on BPI-R2-Pro
arm64: dts: rockchip: add RTC to BPI-R2 Pro
arm64: dts: rockchip: Enable HDMI audio on Quartz64 A
arm64: dts: rockchip: Add HDMI audio nodes to rk356x
arm64: dts: rockchip: adjust whitespace around '='
arm64: dts: rockchip: enable vop2 and hdmi tx on rock-3a
arm64: dts: rockchip: enable vop2 and hdmi tx on quartz64a
arm64: dts: rockchip: rk3568-evb: Enable VOP2 and hdmi
arm64: dts: rockchip: rk356x: Add HDMI nodes
...
Link: https://lore.kernel.org/r/40088956.J2Yia2DhmK@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Krzysztof Kozlowski [Tue, 5 Jul 2022 11:44:14 +0000 (13:44 +0200)]
Merge branch 'for-v5.20/aspeed-dts-cleanup' into for-v5.20/dts-cleanup
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:30 +0000 (17:53 -0700)]
ARM: dts: aspeed: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-37-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:29 +0000 (17:53 -0700)]
ARM: dts: aspeed: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-36-krzysztof.kozlowski@linaro.org
Chanho Park [Fri, 1 Jul 2022 01:52:26 +0000 (10:52 +0900)]
arm64: dts: exynosautov9: add usi device tree nodes
Universal Serial Interface (USI) supports three types of serial interface
such as Universal Asynchronous Receiver and Transmitter (UART), Serial
Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C).
Each protocols can be working independently and configured as one of
those using external configuration inputs.
Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c
and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
So, we can define one USI node that includes serial/spi and hsi2c.
usi_i2c nodes can be used only for i2c mode.
We can have below combinations for one USI.
1) The usi node is used either 4 pin uart or 4 pin spi
-> No usi_i2c can be used
2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)
-> usi_i2c should be enabled to use the latter i2c
3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)
-> usi_i2c should be enabled to use the latter i2c
By default, all USIs are initially set to uart mode by below setting.
samsung,mode = <USI_V2_UART>;
You can change it either USI_V2_SPI or USI_V2_I2C.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com
Chanho Park [Fri, 1 Jul 2022 01:52:25 +0000 (10:52 +0900)]
arm64: dts: exynosautov9: prepare usi0 changes
Before adding whole USI nodes, this applies the changes of usi0 in
advance. To be the usi0 and serian_0 nodes as SoC default, some
properties should be moved to exynosautov9-sadk.dts.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
Chanho Park [Fri, 1 Jul 2022 01:52:24 +0000 (10:52 +0900)]
arm64: dts: exynosautov9: add pdma0 device tree node
Add an ARM pl330 dma controller DT node as pdma0.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com
Chanho Park [Fri, 1 Jul 2022 01:52:22 +0000 (10:52 +0900)]
dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible
Add samsung,exynosautov9-usi dedicated compatible for representing USI
of Exynos Auto v9 SoC.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-2-chanho61.park@samsung.com
Chanho Park [Mon, 27 Jun 2022 00:58:32 +0000 (09:58 +0900)]
arm64: dts: exynosautov9: correct spi11 pin names
They should be started with "gpp5-".
Fixes:
31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220627005832.8709-1-chanho61.park@samsung.com
Marek Vasut [Sun, 22 May 2022 20:24:04 +0000 (22:24 +0200)]
ARM: dts: stm32: Add ST MIPID02 bindings to AV96
Add DT bindings for ST MIPID02 and DCMI to Avenger96 base DT.
Both the ST MIPID02 and DCMI are disabled by default, as the
AV96 camera module is optional.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 22 May 2022 20:24:03 +0000 (22:24 +0200)]
ARM: dts: stm32: Add alternate pinmux for RCC pin
Add another mux option for RCC pin, this is used on AV96 board
for e.g. sensor clock supply.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 22 May 2022 20:24:02 +0000 (22:24 +0200)]
ARM: dts: stm32: Add alternate pinmux for DCMI pins
Add another mux option for DCMI pins, this is used on AV96 board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:05 +0000 (02:21 +0200)]
ARM: dts: stm32: Add DHCOR based DRC Compact board
Add DT for DH DRC Compact unit, which is a universal controller device.
The system has two ethernet ports, one CAN, RS485 and RS232, USB, uSD
card slot, eMMC and SDIO Wi-Fi.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:04 +0000 (02:21 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART5 pins
Add another mux option for UART5 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:03 +0000 (02:21 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART4 pins
Add another mux option for UART4 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:02 +0000 (02:21 +0200)]
ARM: dts: stm32: Add alternate pinmux for UART3 pins
Add another mux option for UART3 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:01 +0000 (02:21 +0200)]
ARM: dts: stm32: Add alternate pinmux for SPI2 pins
Add another mux option for SPI2 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:21:00 +0000 (02:21 +0200)]
ARM: dts: stm32: Add alternate pinmux for CAN1 pins
Add another mux option for CAN1 pins, this is used on DRC Compact board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:20:59 +0000 (02:20 +0200)]
dt-bindings: arm: stm32: Add compatible string for DH electronics DHCOR DRC Compact
Add DT compatible string for DH electronics STM32MP15xx DHCOR on DRC Compact
carrier board into YAML DT binding document. This system is a general purpose
DIN Rail Controller design.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Sun, 26 Jun 2022 00:15:59 +0000 (02:15 +0200)]
ARM: dts: stm32: Fix SPI2 pinmux pin comments on stm32mp15
Those pin comments refer to SPI2 pins, not SPI1 pins, update the comments.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Herve Codina [Mon, 4 Jul 2022 10:28:45 +0000 (12:28 +0200)]
ARM: dts: lan966x: Add UDPHS support
Add UDPHS (the USB High Speed Device Port controller) support.
The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704102845.168438-4-herve.codina@bootlin.com
Herve Codina [Mon, 4 Jul 2022 10:28:44 +0000 (12:28 +0200)]
dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
The USB device controller available in the Microchip LAN9662 SOC
is the same IP as the one present in the SAMA5D3 SOC.
Add the LAN9662 compatible string and set the SAMA5D3 compatible
string as a fallback for the LAN9662.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704102845.168438-3-herve.codina@bootlin.com
Gabriel Fernandez [Fri, 13 May 2022 14:51:48 +0000 (16:51 +0200)]
ARM: dts: stm32: add optee reserved memory on stm32mp135f-dk
Add the static OP-TEE reserved memory regions.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Gabriel Fernandez [Wed, 23 Feb 2022 09:18:19 +0000 (10:18 +0100)]
ARM: dts: stm32: add RCC on STM32MP13x SoC family
Enables Reset and Clocks Controller on STM32MP13
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Gabriel Fernandez [Wed, 23 Feb 2022 09:16:06 +0000 (10:16 +0100)]
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13
Enable optee and SCMI clocks support.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Alexandre Torgue [Mon, 13 Jun 2022 09:34:19 +0000 (11:34 +0200)]
dt-bindings: rcc: stm32: select the "secure" path for stm32mp13
Like for stm32mp15, when stm32 RCC node is used to interact with a secure
context (using clock SCMI protocol), a different path has to be used for
yaml verification.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Leonard Göhrs [Fri, 3 Jun 2022 09:44:21 +0000 (11:44 +0200)]
ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32
According to the OSD32MP1 Power System overview[1] the EEPROM is connected to
the VDD line and not to some single-purpose fixed regulator.
Set the EEPROM supply according to the diagram to eliminate this parent-less
regulator.
[1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Leonard Göhrs [Fri, 3 Jun 2022 09:44:20 +0000 (11:44 +0200)]
ARM: dts: stm32: fix missing internally connected voltage regulator for OSD32MP1
According to the OSD32MP1 Power System overview[1] ldo3's input is always
internally connected to vdd_ddr.
[1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Krzysztof Kozlowski [Thu, 26 May 2022 20:36:32 +0000 (22:36 +0200)]
ARM: dts: stm32: adjust whitespace around '=' on MCU boards
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Wed, 4 May 2022 12:49:45 +0000 (14:49 +0200)]
ARM: dts: stm32: Move DHCOR BUCK3 VDD 2V9 adjustment to 1V8 DTSI
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.
The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabien Dessenne [Tue, 3 May 2022 14:56:06 +0000 (16:56 +0200)]
ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Kavyasree Kotagiri [Mon, 4 Jul 2022 13:58:09 +0000 (11:58 -0200)]
ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220704135809.6952-1-kavyasree.kotagiri@microchip.com
Geert Uytterhoeven [Mon, 4 Jul 2022 16:16:26 +0000 (18:16 +0200)]
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
The scif0 nodes were accidentally inserted after the scif3 nodes,
breaking alphabetical sort order.
Fixes:
1614c8624a48b9c9 ("arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2fe0e782351c202ed009dcd658f4bceec8f3a56d.1656951240.git.geert+renesas@glider.be
Linus Walleij [Fri, 1 Jul 2022 22:53:39 +0000 (00:53 +0200)]
ARM: dts: ux500: Drop unused i2c power domain supply
This regulator supply is replaced by the proper power
domain.
Reported-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220701225339.814962-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Michael Riesch [Tue, 14 Jun 2022 23:03:54 +0000 (01:03 +0200)]
arm64: dts: rockchip: enable hdmi tx audio on rock-3a
Enable the I2S0 controller and the hdmi-sound node on the Radxa
ROCK3 Model A.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220614230354.3756364-2-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Riesch [Tue, 14 Jun 2022 23:03:53 +0000 (01:03 +0200)]
arm64: dts: rockchip: enable hdmi tx audio on rk3568-evb1-v10
Enable the I2S0 controller and the hdmi-sound node on the Rockchip
RK3568 EVB1.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220614230354.3756364-1-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Arnd Bergmann [Mon, 4 Jul 2022 12:32:32 +0000 (14:32 +0200)]
Merge tag 'omap-for-v5.20/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes omaps for v5.20 merge window
Just one devicetree change to add EEPROM regulator for BeagleBone Black.
* tag 'omap-for-v5.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black
Link: https://lore.kernel.org/r/pull-1656918942-515224@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fabrice Gasnier [Tue, 21 Jun 2022 08:45:09 +0000 (10:45 +0200)]
ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
The USBH composed of EHCI and OHCI controllers needs the PHY clock to be
initialized first, before enabling (gating) them. The reverse is also
required when going to suspend.
So, add USBPHY clock as 1st entry in both controllers, so the USBPHY PLL
gets enabled 1st upon controller init. Upon suspend/resume, this also makes
the clock to be disabled/re-enabled in the correct order.
This fixes some IRQ storm conditions seen when going to low-power, due to
PHY PLL being disabled before all clocks are cleanly gated.
Fixes:
949a0c0dec85 ("ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c")
Fixes:
db7be2cb87ae ("ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Gabriel Fernandez [Fri, 24 Jun 2022 09:27:15 +0000 (11:27 +0200)]
ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
Delete the node fixed clock managed by secure world with SCMI.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Gabriel Fernandez [Fri, 24 Jun 2022 09:27:14 +0000 (11:27 +0200)]
ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
LSE clock is provided by SCMI.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Gabriel Fernandez [Fri, 24 Jun 2022 09:27:13 +0000 (11:27 +0200)]
ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
The peripheral clock of CEC is not LSE but CEC.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Etienne Carriere [Fri, 24 Jun 2022 09:00:55 +0000 (11:00 +0200)]
ARM: dts: stm32: fix pwr regulators references to use scmi
Fixes stm32mp15*-scmi DTS files introduced in [1] to also access PWR
regulators through SCMI service. This is needed since enabling secure
only access to RCC clock and reset controllers also enables secure
access only on PWR voltage regulators reg11, reg18 and usb33 hence
these must also be accessed through SCMI Voltage Domain protocol.
This change applies on commit [2] that already corrects issues from
commit [1].
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: [1] https://lore.kernel.org/linux-arm-kernel/
20220422150952.20587-7-alexandre.torgue@foss.st.com
Link: [2] https://lore.kernel.org/linux-arm-kernel/
20220613071920.5463-1-alexandre.torgue@foss.st.com
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Kavyasree Kotagiri [Mon, 27 Jun 2022 11:05:52 +0000 (16:35 +0530)]
ARM: dts: lan966x: Add mcan1 node.
Add the mcan1 node. By default, keep it disabled.
Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220627110552.26315-1-kavyasree.kotagiri@microchip.com
Claudiu Beznea [Fri, 10 Jun 2022 09:24:14 +0000 (12:24 +0300)]
ARM: dts: at91: sama7g5: add reset-controller node
Add reset controller node.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220610092414.1816571-10-claudiu.beznea@microchip.com
Claudiu Beznea [Fri, 10 Jun 2022 09:24:06 +0000 (12:24 +0300)]
ARM: dts: at91: use generic name for reset controller
Use generic name for reset controller of AT91 devices to comply with
DT specifications.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610092414.1816571-2-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 15 Jun 2022 08:06:33 +0000 (11:06 +0300)]
ARM: dts: at91: sama5d2: fix compilation warning
Fix the following compilation warning:
arch/arm/boot/dts/sama5d2.dtsi:371.29-382.6: Warning
(avoid_unnecessary_addr_size): /ahb/apb/ethernet@
f8008000:
unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
also defined at arch/arm/boot/dts/at91-sama5d2_icp.dts:353.8-363.3
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220615080633.1881196-2-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 15 Jun 2022 08:06:32 +0000 (11:06 +0300)]
ARM: dts: at91: sama5d2: fix compilation warning
Fix the following compilation warning:
Warning (simple_bus_reg): /ahb/apb/resistive-touch: missing or empty reg/ranges property
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220615080633.1881196-1-claudiu.beznea@microchip.com
Arnd Bergmann [Fri, 1 Jul 2022 14:15:53 +0000 (16:15 +0200)]
Merge tag 'amlogic-arm64-dt-for-v5.20' of git://git./linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v5.20:
- adjust whitespace around '='
- add reset controller node for Meson-S4 SoC
- correct gpio-keys properties
- align gpio-key node names with dtschema
- add gpio-fan control to GS-King-X
* tag 'amlogic-arm64-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: add gpio-fan control to GS-King-X
arm64: dts: amlogic: align gpio-key node names with dtschema
arm64: dts: amlogic: correct gpio-keys properties
arm64: dts: meson: add reset controller for Meson-S4 SoC
arm64: dts: amlogic: adjust whitespace around '='
Link: https://lore.kernel.org/r/9c8b8570-f20c-ce9a-8c6c-51fdadf7722c@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:15:23 +0000 (16:15 +0200)]
Merge tag 'amlogic-arm-dt-for-v5.20' of git://git./linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM DT changes for v5.20:
- adjust whitespace around '=' in ARM meson DT
* tag 'amlogic-arm-dt-for-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: meson: adjust whitespace around '='
Link: https://lore.kernel.org/r/51034acd-13db-5c25-7b9f-ff87537406bd@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:14:16 +0000 (16:14 +0200)]
Merge tag 'dt-cleanup-5.20' of git://git./linux/kernel/git/krzk/linux into arm/dt
Cleanup of ARM DTS for v5.20
Series of cleanups for ARM DTS:
1. White-spaces, gpio-key subnode names, USB DWC3/EHCI node names,
2. Add board-level compatibles to Aspeed evaluation boards.
* tag 'dt-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: stih407-family: Harmonize DWC USB3 DT nodes name
ARM: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name
ARM: dts: ast2600-evb-a1: fix board compatible
ARM: dts: ast2600-evb: fix board compatible
ARM: dts: ast2500-evb: fix board compatible
ARM: dts: animeo: correct gpio-keys properties
ARM: dts: animeo: align gpio-key node names with dtschema
ARM: dts: sd: adjust whitespace around '='
ARM: dts: sti: adjust whitespace around '='
ARM: dts: ste: adjust whitespace around '='
ARM: dts: nuvoton: adjust whitespace around '='
ARM: dts: lpc: adjust whitespace around '='
ARM: dts: ecx: adjust whitespace around '='
ARM: dts: alpine: adjust whitespace around '='
ARM: dts: spear: adjust whitespace around '='
ARM: dts: axm: adjust whitespace around '='
ARM: dts: at91: adjust whitespace around '='
ARM: dts: aspeed: adjust whitespace around '='
ARM: dts: pxa: adjust whitespace around '='
Link: https://lore.kernel.org/r/20220627082842.50508-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:13:27 +0000 (16:13 +0200)]
Merge tag 'dt64-cleanup-5.20' of git://git./linux/kernel/git/krzk/linux into arm/dt
Cleanup of ARM64 DTS for v5.20
Series of cleanups for ARM64 DTS: White-spaces, gpio-key subnode names,
USB DWC3/EHCI node names.
* tag 'dt64-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: apm: Harmonize DWC USB3 DT nodes name
arm64: dts: hisilicon: correct gpio-keys properties
arm64: dts: hisilicon: align gpio-key node names with dtschema
arm64: dts: broadcom: align gpio-key node names with dtschema
arm64: dts: apm: correct gpio-keys properties
arm64: dts: microchip: adjust whitespace around '='
arm64: dts: sprd: adjust whitespace around '='
arm64: dts: hisilicon: adjust whitespace around '='
arm64: dts: marvell: adjust whitespace around '='
arm64: dts: lg: adjust whitespace around '='
arm64: dts: apm: adjust whitespace around '='
arm64: dts: amd: adjust whitespace around '='
Link: https://lore.kernel.org/r/20220627082842.50508-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:11:58 +0000 (16:11 +0200)]
Merge tag 'socfpga_dts_updates_for_v5.20' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v5.20
- Clean up the Mercury++ AA1 dts
- Add support the Google Chameleon v3 board
- Add defined GIC interrupt type for Agilex ECC
- Fix coding style around Stratix10 QSPI dts entry
- Add support for Stratix10 SW Virtual platform
- Move clocks entry out of the Stratix10 soc node
* tag 'socfpga_dts_updates_for_v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: altera: socfpga_stratix10: move clocks out of soc node
arm64: dts: Add support for Stratix 10 Software Virtual Platform
dt-bindings: altera: document Stratix 10 SWVP compatibles
arm64: dts: altera: adjust whitespace around '='
arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC
dt-bindings: altera: Add Chameleon v3 board
ARM: dts: socfpga: Add Google Chameleon v3 devicetree
ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts
ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts
ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi
Link: https://lore.kernel.org/r/20220626004437.1224820-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:08:54 +0000 (16:08 +0200)]
Merge tag 'renesas-dt-bindings-for-v5.20-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.20
- Reorganize the renesas,prr DT binding document.
* tag 'renesas-dt-bindings-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Move renesas,prr from arm to soc
Link: https://lore.kernel.org/r/cover.1656069640.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:03:00 +0000 (16:03 +0200)]
Merge tag 'renesas-arm-dt-for-v5.20-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.20
- ADC and SPI support for the RZ/G2UL Soc and the RZ/G2UL SMARC EVK
development board,
- Ethernet support for the RZ/V2M SoC and the RZV2MEVK2 development
board,
- Thermal, IOMMU, Universal Flash Storage, octal Cortex-A55, and full
serial support for the R-Car S4-8 SoC on the Spider development
board,
- RTC support for the RZN1D-DB board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
ARM: dts: rza2mevb: Fix LED node names
arm64: dts: renesas: Fix thermal-sensors on single-zone sensors
arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector
arm64: dts: renesas: r8a779f0: Add SCIF nodes
arm64: dts: renesas: r8a779f0: Add HSCIF nodes
arm64: dts: renesas: r8a779f0: Add DMA properties to SCIF3
arm64: dts: renesas: Add missing space after remote-endpoint
arm64: dts: renesas: rzg2ul-smarc-som: Enable ADC on SMARC platform
arm64: dts: renesas: rzg2ul-smarc: Enable RSPI1 on carrier board
arm64: dts: renesas: r8a779f0: Add CPU core clocks
arm64: dts: renesas: r8a779f0: Add CPUIdle support
arm64: dts: renesas: r8a779f0: Add secondary CA55 CPU cores
arm64: dts: renesas: r8a779f0: Add L3 cache controller
arm64: dts: renesas: r8a779a0: Add CPU0 core clock
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
ARM: dts: r9a06g032-rzn1d400-db: Enable rtc0
arm64: dts: renesas: rzg2l-smarc: Use proper bool operator
arm64: dts: renesas: r8a779f0: Add UFS node
arm64: dts: renesas: r8a779f0: Add iommus to DMAC nodes
arm64: dts: renesas: r8a779f0: Add IPMMU nodes
...
Link: https://lore.kernel.org/r/cover.1656069634.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:01:52 +0000 (16:01 +0200)]
Merge tag 'samsung-dt64-5.20' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.20
1. Add CPU cache, UFS to Tesla FSD.
2. Add reboot-mode (boot into specific bootloader mode) to ExynosAutov9.
3. Add watchdogs to ExynosAutov9.
4. Add eMMC to Exynos7885 JackpotLTE (Samsung Galaxy A8).
5. DTS cleanup: white-spaces, node names, LED color/function.
6. Switch to DTS-local header for pinctrl register values instead of
bindings header. The bindings header is being deprecated because it
does not reflect the purpose of bindings.
* tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add internal eMMC support to jackpotlte
dt-bindings: clock: Add indices for Exynos7885 TREX clocks
dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS
arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADK
arm64: dts: exynos: add secondary ufs devices in ExynosAutov9
arm64: dts: fsd: use local header for pinctrl register values
arm64: dts: exynos: use local header for pinctrl register values
arm64: dts: exynos: align MMC node name with dtschema
arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9
arm64: dts: exynos: adjust whitespace around '='
arm64: dts: fsd: add ufs device node
arm64: dts: exynos: add watchdog in ExynosAutov9
arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9
dt-bindings: soc: add samsung,boot-mode definitions
arm64: dts: fsd: Add cpu cache information
Link: https://lore.kernel.org/r/20220624080746.31947-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 1 Jul 2022 14:00:56 +0000 (16:00 +0200)]
Merge tag 'samsung-dt-5.20' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.20
1. Add display panel and backlight to P4 Note family (Samsung Galaxy
Note 10.1).
2. DTS cleanup: white-spaces, node names, LED color/function.
3. Switch to DTS-local header for pinctrl register values instead of
bindings header. The bindings header is being deprecated because it
does not reflect the purpose of bindings.
* tag 'samsung-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: add function and color to LED nodes in Odroid XU/XU3
ARM: dts: exynos: add function and color to LED node in Odroid XU4
ARM: dts: exynos: add function and color to LED node in Odroid HC1
ARM: dts: exynos: add function and color to LED nodes in Odroid X/X2
ARM: dts: exynos: add function and color to LED node in Odroid U3
ARM: dts: exynos: add function and color to LED nodes in Itop Elite
ARM: dts: exynos: add function to LED nodes in Tiny4412
ARM: dts: exynos: add function to LED node in Origen 4210
ARM: dts: exynos: add function and color to aat1290 flash LED node in Galaxy S3
ARM: dts: exynos: align aat1290 flash LED node with bindings in Galaxy S3
ARM: dts: s5pv210: align gpio-key node names with dtschema
ARM: dts: exynos: align gpio-key node names with dtschema
ARM: dts: exynos: use local header for pinctrl register values
ARM: dts: s5pv210: use local header for pinctrl register values
ARM: dts: s3c64xx: use local header for pinctrl register values
ARM: dts: s3c2410: use local header for pinctrl register values
ARM: dts: exynos: align MMC node name with dtschema
ARM: dts: exynos: adjust whitespace around '='
ARM: dts: exynos: add panel and backlight to p4note
Link: https://lore.kernel.org/r/20220624080746.31947-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Clément Léger [Fri, 24 Jun 2022 14:40:00 +0000 (16:40 +0200)]
ARM: dts: r9a06g032-rzn1d400-db: Add switch description
Add the description for the switch, GMAC2 and MII converter. With these
definitions, the switch ports 0 and 1 (MII ports 5 and 4) are working on
the RZ/N1D-DB board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-16-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Clément Léger [Fri, 24 Jun 2022 14:39:49 +0000 (16:39 +0200)]
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
This MII converter can be found on the RZ/N1 processor family. The MII
converter ports are declared as subnodes which are then referenced by
users of the PCS driver such as the switch.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-5-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Clément Léger [Fri, 24 Jun 2022 14:39:59 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: Describe switch
Add the description of the switch that is present on the RZ/N1 SoC. This
description includes ethernet-port descriptions for all the ports that
are present on the switch along with their connection to the MII
converter ports and to the GMAC for the CPU port.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-15-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Clément Léger [Fri, 24 Jun 2022 14:39:58 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: Describe GMAC2
The RZ/N1 SoC includes two MACs named GMACx that are compatible with the
"snps,dwmac" driver. GMAC1 is connected directly to the MII converter
port 1. GMAC2 however can be used as the MAC for the switch CPU
management port or can be muxed to be connected directly to the MII
converter port 2. This commit adds the description for the GMAC2 which
will be used by the switch description.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-14-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Clément Léger [Fri, 24 Jun 2022 14:39:57 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: Describe MII converter
Add the MII converter node which describes the MII converter that is
present on the RZ/N1 SoC.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-13-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Chris Paterson [Thu, 23 Jun 2022 10:30:24 +0000 (11:30 +0100)]
arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
This dts is for the RZ/V2L SMARC EVK, not RZ/G2L.
Fixes:
f91c4c74796a ("arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK")
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Link: https://lore.kernel.org/r/20220623103024.24222-1-chris.paterson2@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Tue, 21 Jun 2022 13:33:10 +0000 (15:33 +0200)]
ARM: dts: renesas: Fix DA9063 watchdog subnode names
make dtbs_check:
arch/arm/boot/dts/r8a7791-koelsch-single-memory-node.dtb: pmic@58: 'wdt' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mfd/dlg,da9063.yaml
...
Change the watchdog child node names to match the DA9063 DT bindings and
the Generic Names Recommendation in the Devicetree Specification.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1dafdce285f7d14bec9e2033ac87fb30135895db.1655818230.git.geert+renesas@glider.be
Geert Uytterhoeven [Fri, 17 Jun 2022 09:36:58 +0000 (11:36 +0200)]
arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz
The highest-performance mode for the Cortex-A57 CPU cores supported on
R-Car H3Ne (R8A779M8) is the Power Optimized (1.5 GHz) mode. The Normal
(1.6 GHz) and High Performance (1.7 GHz) modes are not supported.
Hence drop the "turbo-mode" entries from the operating points table
inherited from r8a77951.dtsi.
Fixes:
6e87525d751fac57 ("arm64: dts: renesas: Add Renesas R8A779M8 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/aeb4530f7fbac8329b334dcb169382c836a5f32d.1655458564.git.geert+renesas@glider.be
Sudeep Holla [Wed, 29 Jun 2022 09:59:59 +0000 (10:59 +0100)]
arm64: dts: juno: Add cache-level property to L2 caches
Add the missing cache-level property to L2 caches. This is needed if
we need to find the last level cache directly from the device tree cache
node.
Link: https://lore.kernel.org/r/20220629095959.1115587-1-sudeep.holla@arm.com
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Mark Brown [Mon, 20 Jun 2022 15:21:50 +0000 (16:21 +0100)]
ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black
The identification EEPROM on the BeagleBone Black baseboard is supplied
by VDD_3V3A which is supplied by LDO4 on the PMIC. Map this as per the DT
binding for the EEPROM. Since this supply is always-on this has no
practical impact but it does silence a warning at boot due to using a dummy
regulator.
Signed-off-by: Mark Brown <broonie@kernel.org>
Message-Id: <
20220620152150.708664-1-broonie@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Krzysztof Kozlowski [Sun, 26 Jun 2022 12:03:41 +0000 (14:03 +0200)]
ARM: dts: s5pv210: align SDHCI node name with dtschema
The node names should be generic and DT schema expects "mmc".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220626120342.38851-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 26 Jun 2022 12:03:40 +0000 (14:03 +0200)]
ARM: dts: s3c64xx: align SDHCI node name with dtschema
The node names should be generic and DT schema expects "mmc".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220626120342.38851-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 26 Jun 2022 12:03:39 +0000 (14:03 +0200)]
ARM: dts: s3c24xx: align SDHCI node name with dtschema
The node names should be generic and DT schema expects "mmc".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220626120342.38851-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Sun, 26 Jun 2022 12:03:38 +0000 (14:03 +0200)]
ARM: dts: exynos: align SDHCI node name with dtschema
The node names should be generic and DT schema expects "mmc".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220626120342.38851-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:33 +0000 (17:53 -0700)]
ARM: dts: at91: drop unneeded status from gpio-keys
Nodes do not need explicit status=okay.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220616005333.18491-40-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:32 +0000 (17:53 -0700)]
ARM: dts: at91: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220616005333.18491-39-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:31 +0000 (17:53 -0700)]
ARM: dts: at91: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220616005333.18491-38-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:26 +0000 (17:53 -0700)]
ARM: dts: omap: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-33-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:25 +0000 (17:53 -0700)]
ARM: dts: omap: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-32-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:05 +0000 (17:53 -0700)]
arm64: dts: marvell: armada-3720: align lednode names with dtschema
The node names should be generic and DT schema expects certain pattern
with 'led'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-12-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:04 +0000 (17:53 -0700)]
arm64: dts: marvell: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-11-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:07 +0000 (17:53 -0700)]
ARM: dts: marvell: correct gpio-keys properties
gpio-keys children do not use unit addresses.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-14-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 16 Jun 2022 00:53:06 +0000 (17:53 -0700)]
ARM: dts: marvell: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-13-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 26 May 2022 20:40:44 +0000 (22:40 +0200)]
ARM: dts: omap: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204044.831656-1-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Thu, 26 May 2022 20:41:37 +0000 (22:41 +0200)]
ARM: dts: ti: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204139.831895-2-krzysztof.kozlowski@linaro.org
projects / linux-2.6-microblaze.git / log