From: Jisheng Zhang Date: Thu, 26 Aug 2021 14:11:18 +0000 (+0800) Subject: riscv: Move EXCEPTION_TABLE to RO_DATA segment X-Git-Tag: microblaze-v5.16~14^2 X-Git-Url: http://git.monstr.eu/?p=linux-2.6-microblaze.git;a=commitdiff_plain;h=6f55ab36bef505b449723300a5a445ddc76a94d7 riscv: Move EXCEPTION_TABLE to RO_DATA segment _ex_table section is read-only, so move it to RO_DATA. Signed-off-by: Jisheng Zhang Signed-off-by: Palmer Dabbelt --- diff --git a/arch/riscv/kernel/vmlinux-xip.lds.S b/arch/riscv/kernel/vmlinux-xip.lds.S index af776555ded9..9c9f35091ef0 100644 --- a/arch/riscv/kernel/vmlinux-xip.lds.S +++ b/arch/riscv/kernel/vmlinux-xip.lds.S @@ -121,7 +121,6 @@ SECTIONS } BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 0) - EXCEPTION_TABLE(0x10) .rel.dyn : AT(ADDR(.rel.dyn) - LOAD_OFFSET) { *(.rel.dyn*) diff --git a/arch/riscv/kernel/vmlinux.lds.S b/arch/riscv/kernel/vmlinux.lds.S index 502d0826ecb1..5104f3a871e3 100644 --- a/arch/riscv/kernel/vmlinux.lds.S +++ b/arch/riscv/kernel/vmlinux.lds.S @@ -4,6 +4,8 @@ * Copyright (C) 2017 SiFive */ +#define RO_EXCEPTION_TABLE_ALIGN 16 + #ifdef CONFIG_XIP_KERNEL #include "vmlinux-xip.lds.S" #else @@ -112,8 +114,6 @@ SECTIONS *(.srodata*) } - EXCEPTION_TABLE(0x10) - . = ALIGN(SECTION_ALIGN); _data = .;