PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offset

While the Designware controller appears to hard code the PCI_CAP_ID_EXP
capability register at 0x70, there's no need to hard code this in the
driver as it is discoverable.

Link: https://lore.kernel.org/r/20200821035420.380495-31-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: linux-omap@vger.kernel.org

diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
index dc38772..d42e066 100644 (file)
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -73,8 +73,6 @@
 #define        LINK_UP                                         BIT(16)
 #define        DRA7XX_CPU_TO_BUS_ADDR                          0x0FFFFFFF
 
-#define EXP_CAP_ID_OFFSET                              0x70
-
 #define        PCIECTRL_TI_CONF_INTX_ASSERT                    0x0124
 #define        PCIECTRL_TI_CONF_INTX_DEASSERT                  0x0128
 
@@ -142,7 +140,7 @@ static int dra7xx_pcie_establish_link(struct dw_pcie *pci)
        struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
        struct device *dev = pci->dev;
        u32 reg;
-       u32 exp_cap_off = EXP_CAP_ID_OFFSET;
+       u32 exp_cap_off = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
 
        if (dw_pcie_link_up(pci)) {
                dev_err(dev, "link is already up\n");

diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 0fe792f..39a5a72 100644 (file)
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -96,8 +96,6 @@
 #define LEG_EP                         0x1
 #define RC                             0x2
 
-#define EXP_CAP_ID_OFFSET              0x70
-
 #define KS_PCIE_SYSCLOCKOUTEN          BIT(0)
 
 #define AM654_PCIE_DEV_TYPE_MASK       0x3
@@ -1125,22 +1123,23 @@ static int ks_pcie_am654_set_mode(struct device *dev,
 static void ks_pcie_set_link_speed(struct dw_pcie *pci, int link_speed)
 {
        u32 val;
+       u32 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
 
        dw_pcie_dbi_ro_wr_en(pci);
 
-       val = dw_pcie_readl_dbi(pci, EXP_CAP_ID_OFFSET + PCI_EXP_LNKCAP);
+       val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
        if ((val & PCI_EXP_LNKCAP_SLS) != link_speed) {
                val &= ~((u32)PCI_EXP_LNKCAP_SLS);
                val |= link_speed;
-               dw_pcie_writel_dbi(pci, EXP_CAP_ID_OFFSET + PCI_EXP_LNKCAP,
+               dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP,
                                   val);
        }
 
-       val = dw_pcie_readl_dbi(pci, EXP_CAP_ID_OFFSET + PCI_EXP_LNKCTL2);
+       val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCTL2);
        if ((val & PCI_EXP_LNKCAP_SLS) != link_speed) {
                val &= ~((u32)PCI_EXP_LNKCAP_SLS);
                val |= link_speed;
-               dw_pcie_writel_dbi(pci, EXP_CAP_ID_OFFSET + PCI_EXP_LNKCTL2,
+               dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCTL2,
                                   val);
        }
 

diff --git a/drivers/pci/controller/dwc/pcie-spear13xx.c b/drivers/pci/controller/dwc/pcie-spear13xx.c
index 6284656..056c945 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-spear13xx.c
+++ b/drivers/pci/controller/dwc/pcie-spear13xx.c
@@ -65,8 +65,6 @@ struct pcie_app_reg {
 /* CR6 */
 #define MSI_CTRL_INT                           (1 << 26)
 
-#define EXP_CAP_ID_OFFSET                      0x70
-
 #define to_spear13xx_pcie(x)   dev_get_drvdata((x)->dev)
 
 static int spear13xx_pcie_establish_link(struct spear13xx_pcie *spear13xx_pcie)
@@ -75,7 +73,7 @@ static int spear13xx_pcie_establish_link(struct spear13xx_pcie *spear13xx_pcie)
        struct pcie_port *pp = &pci->pp;
        struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
        u32 val;
-       u32 exp_cap_off = EXP_CAP_ID_OFFSET;
+       u32 exp_cap_off = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
 
        if (dw_pcie_link_up(pci)) {
                dev_err(pci->dev, "link already up\n");