s390/bpf: Load literal pool register using larl

Currently literal pool register is loaded using basr, which makes it
point not to the beginning of the literal pool, but rather to the next
instruction. In case JITed code is larger than 512k, this renders
literal pool register absolutely useless due to long displacement range
restrictions.

The solution is to use larl to make literal pool register point to the
very beginning of the literal pool. This makes it always possible to
address 512k worth of literal pool entries using long displacement.

However, for short programs, in which the entire literal pool is covered
by basr-generated base, it is still beneficial to use basr, since it is
4 bytes shorter than larl.

Detect situations when basr-generated base does not cover the entire
literal pool, and in such cases use larl instead.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Link: https://lore.kernel.org/bpf/20191118180340.68373-4-iii@linux.ibm.com

diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index bb0215d..964a09f 100644 (file)
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -352,6 +352,15 @@ static bool can_use_rel(struct bpf_jit *jit, int off)
        return is_valid_rel(off - jit->prg);
 }
 
+/*
+ * Return whether given displacement can be encoded using
+ * Long-Displacement Facility
+ */
+static bool is_valid_ldisp(int disp)
+{
+       return disp >= -524288 && disp <= 524287;
+}
+
 /*
  * Fill whole space with illegal instructions
  */
@@ -476,9 +485,16 @@ static void bpf_jit_prologue(struct bpf_jit *jit, u32 stack_depth)
        save_restore_regs(jit, REGS_SAVE, stack_depth);
        /* Setup literal pool */
        if (is_first_pass(jit) || (jit->seen & SEEN_LITERAL)) {
-               /* basr %r13,0 */
-               EMIT2(0x0d00, REG_L, REG_0);
-               jit->base_ip = jit->prg;
+               if (!is_first_pass(jit) &&
+                   is_valid_ldisp(jit->size - (jit->prg + 2))) {
+                       /* basr %l,0 */
+                       EMIT2(0x0d00, REG_L, REG_0);
+                       jit->base_ip = jit->prg;
+               } else {
+                       /* larl %l,lit32_start */
+                       EMIT6_PCREL_RILB(0xc0000000, REG_L, jit->lit32_start);
+                       jit->base_ip = jit->lit32_start;
+               }
        }
        /* Setup stack and backchain */
        if (is_first_pass(jit) || (jit->seen & SEEN_STACK)) {