ARM: dts: Add clksel node for am3 clkout
authorTony Lindgren <tony@atomide.com>
Fri, 4 Feb 2022 07:33:32 +0000 (09:33 +0200)
committerTony Lindgren <tony@atomide.com>
Mon, 11 Apr 2022 13:03:32 +0000 (16:03 +0300)
Let's add a clksel node for the component clocks to avoid devicetree
unique_unit_address warnings. The component clocks can now get IO address
from the parent clksel node.

Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Message-Id: <20220204073333.18175-4-tony@atomide.com>

arch/arm/boot/dts/am33xx-clocks.dtsi

index a70ce9f..632147b 100644 (file)
                };
        };
 
-       sysclkout_pre_ck: sysclkout_pre_ck@700 {
-               #clock-cells = <0>;
-               compatible = "ti,mux-clock";
-               clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
-               reg = <0x0700>;
-       };
+       clock@700 {
+               compatible = "ti,clksel";
+               reg = <0x700>;
+               #clock-cells = <2>;
+               #address-cells = <0>;
 
-       clkout2_div_ck: clkout2_div_ck@700 {
-               #clock-cells = <0>;
-               compatible = "ti,divider-clock";
-               clocks = <&sysclkout_pre_ck>;
-               ti,bit-shift = <3>;
-               ti,max-div = <8>;
-               reg = <0x0700>;
-       };
+               sysclkout_pre_ck: clock-sysclkout-pre {
+                       #clock-cells = <0>;
+                       compatible = "ti,mux-clock";
+                       clock-output-names = "sysclkout_pre_ck";
+                       clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
+               };
 
-       clkout2_ck: clkout2_ck@700 {
-               #clock-cells = <0>;
-               compatible = "ti,gate-clock";
-               clocks = <&clkout2_div_ck>;
-               ti,bit-shift = <7>;
-               reg = <0x0700>;
+               clkout2_div_ck: clock-clkout2-div {
+                       #clock-cells = <0>;
+                       compatible = "ti,divider-clock";
+                       clock-output-names = "clkout2_div_ck";
+                       clocks = <&sysclkout_pre_ck>;
+                       ti,bit-shift = <3>;
+                       ti,max-div = <8>;
+               };
+
+               clkout2_ck: clock-clkout2 {
+                       #clock-cells = <0>;
+                       compatible = "ti,gate-clock";
+                       clock-output-names = "clkout2_ck";
+                       clocks = <&clkout2_div_ck>;
+                       ti,bit-shift = <7>;
+               };
        };
 };