dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate...
authorZhen Lei <thunder.leizhen@huawei.com>
Tue, 29 Sep 2020 14:14:40 +0000 (22:14 +0800)
committerRob Herring <robh@kernel.org>
Thu, 1 Oct 2020 12:24:48 +0000 (07:24 -0500)
Split the devicetree bindings of each Hisilicon controller from
hisilicon.txt into a separate file, the file name is the compatible name
attach the .txt file name extension.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20200929141454.2312-4-thunder.leizhen@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
12 files changed:
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
new file mode 100644 (file)
index 0000000..ceffac5
--- /dev/null
@@ -0,0 +1,8 @@
+Hisilicon CPU controller
+
+Required properties:
+- compatible : "hisilicon,cpuctrl"
+- reg : Register address and size
+
+The clock registers and power registers of secondary cores are defined
+in CPU controller, especially in HIX5HD2 SoC.
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi3798cv200-perictrl.txt
new file mode 100644 (file)
index 0000000..0d5282f
--- /dev/null
@@ -0,0 +1,21 @@
+Hisilicon Hi3798CV200 Peripheral Controller
+
+The Hi3798CV200 Peripheral Controller controls peripherals, queries
+their status, and configures some functions of peripherals.
+
+Required properties:
+- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
+  and "simple-mfd".
+- reg: Register address and size of Peripheral Controller.
+- #address-cells: Should be 1.
+- #size-cells: Should be 1.
+
+Examples:
+
+       perictrl: peripheral-controller@8a20000 {
+               compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
+                            "simple-mfd";
+               reg = <0x8a20000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-aoctrl.txt
new file mode 100644 (file)
index 0000000..5a723c1
--- /dev/null
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Power Always ON domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-aoctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power always
+on domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       ao_ctrl: ao_ctrl@f7800000 {
+               compatible = "hisilicon,hi6220-aoctrl", "syscon";
+               reg = <0x0 0xf7800000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-mediactrl.txt
new file mode 100644 (file)
index 0000000..dcfdcbc
--- /dev/null
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Media domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-mediactrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the multimedia
+domain(e.g. codec, G3D ...) for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       media_ctrl: media_ctrl@f4410000 {
+               compatible = "hisilicon,hi6220-mediactrl", "syscon";
+               reg = <0x0 0xf4410000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-pmctrl.txt
new file mode 100644 (file)
index 0000000..972842f
--- /dev/null
@@ -0,0 +1,18 @@
+Hisilicon Hi6220 Power Management domain controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-pmctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, some clock registers are define
+  under this controller and this property must be present.
+
+Hisilicon designs this system controller to control the power management
+domain for mobile platform.
+
+Example:
+       /*for Hi6220*/
+       pm_ctrl: pm_ctrl@f7032000 {
+               compatible = "hisilicon,hi6220-pmctrl", "syscon";
+               reg = <0x0 0xf7032000 0x0 0x1000>;
+               #clock-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hi6220-sysctrl.txt
new file mode 100644 (file)
index 0000000..07e318e
--- /dev/null
@@ -0,0 +1,19 @@
+Hisilicon Hi6220 system controller
+
+Required properties:
+- compatible : "hisilicon,hi6220-sysctrl"
+- reg : Register address and size
+- #clock-cells: should be set to 1, many clock registers are defined
+  under this controller and this property must be present.
+
+Hisilicon designs this controller as one of the system controllers,
+its main functions are the same as Hisilicon system controller, but
+the register offset of some core modules are different.
+
+Example:
+       /*for Hi6220*/
+       sys_ctrl: sys_ctrl@f7030000 {
+               compatible = "hisilicon,hi6220-sysctrl", "syscon";
+               reg = <0x0 0xf7030000 0x0 0x2000>;
+               #clock-cells = <1>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip01-sysctrl.txt
new file mode 100644 (file)
index 0000000..db2dfdc
--- /dev/null
@@ -0,0 +1,19 @@
+Hisilicon HiP01 system controller
+
+Required properties:
+- compatible : "hisilicon,hip01-sysctrl"
+- reg : Register address and size
+
+The HiP01 system controller is mostly compatible with hisilicon
+system controller,but it has some specific control registers for
+HIP01 SoC family, such as slave core boot, and also some same
+registers located at different offset.
+
+Example:
+
+       /* for hip01-ca9x2 */
+       sysctrl: system-controller@10000000 {
+               compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
+               reg = <0x10000000 0x1000>;
+               reboot-offset = <0x4>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-bootwrapper.txt
new file mode 100644 (file)
index 0000000..b0d5333
--- /dev/null
@@ -0,0 +1,9 @@
+Bootwrapper boot method (software protocol on SMP):
+
+Required Properties:
+- compatible: "hisilicon,hip04-bootwrapper";
+- boot-method: Address and size of boot method.
+  [0]: bootwrapper physical address
+  [1]: bootwrapper size
+  [2]: relocation physical address
+  [3]: relocation size
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,hip04-fabric.txt
new file mode 100644 (file)
index 0000000..40453d0
--- /dev/null
@@ -0,0 +1,5 @@
+Fabric:
+
+Required Properties:
+- compatible: "hisilicon,hip04-fabric";
+- reg: Address and size of Fabric
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pctrl.txt
new file mode 100644 (file)
index 0000000..deec777
--- /dev/null
@@ -0,0 +1,13 @@
+PCTRL: Peripheral misc control register
+
+Required Properties:
+- compatible: "hisilicon,pctrl"
+- reg: Address and size of pctrl.
+
+Example:
+
+       /* for Hi3620 */
+       pctrl: pctrl@fca09000 {
+               compatible = "hisilicon,pctrl";
+               reg = <0xfca09000 0x1000>;
+       };
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,sysctrl.txt
new file mode 100644 (file)
index 0000000..963f7f1
--- /dev/null
@@ -0,0 +1,25 @@
+Hisilicon system controller
+
+Required properties:
+- compatible : "hisilicon,sysctrl"
+- reg : Register address and size
+
+Optional properties:
+- smp-offset : offset in sysctrl for notifying slave cpu booting
+               cpu 1, reg;
+               cpu 2, reg + 0x4;
+               cpu 3, reg + 0x8;
+               If reg value is not zero, cpun exit wfi and go
+- resume-offset : offset in sysctrl for notifying cpu0 when resume
+- reboot-offset : offset in sysctrl for system reboot
+
+Example:
+
+       /* for Hi3620 */
+       sysctrl: system-controller@fc802000 {
+               compatible = "hisilicon,sysctrl";
+               reg = <0xfc802000 0x1000>;
+               smp-offset = <0x31c>;
+               resume-offset = <0x308>;
+               reboot-offset = <0x4>;
+       };
index 54f423d..ffe760a 100644 (file)
@@ -55,197 +55,3 @@ Required root node properties:
 HiP07 D05 Board
 Required root node properties:
        - compatible = "hisilicon,hip07-d05";
-
-Hisilicon system controller
-
-Required properties:
-- compatible : "hisilicon,sysctrl"
-- reg : Register address and size
-
-Optional properties:
-- smp-offset : offset in sysctrl for notifying slave cpu booting
-               cpu 1, reg;
-               cpu 2, reg + 0x4;
-               cpu 3, reg + 0x8;
-               If reg value is not zero, cpun exit wfi and go
-- resume-offset : offset in sysctrl for notifying cpu0 when resume
-- reboot-offset : offset in sysctrl for system reboot
-
-Example:
-
-       /* for Hi3620 */
-       sysctrl: system-controller@fc802000 {
-               compatible = "hisilicon,sysctrl";
-               reg = <0xfc802000 0x1000>;
-               smp-offset = <0x31c>;
-               resume-offset = <0x308>;
-               reboot-offset = <0x4>;
-       };
-
------------------------------------------------------------------------
-Hisilicon Hi3798CV200 Peripheral Controller
-
-The Hi3798CV200 Peripheral Controller controls peripherals, queries
-their status, and configures some functions of peripherals.
-
-Required properties:
-- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon"
-  and "simple-mfd".
-- reg: Register address and size of Peripheral Controller.
-- #address-cells: Should be 1.
-- #size-cells: Should be 1.
-
-Examples:
-
-       perictrl: peripheral-controller@8a20000 {
-               compatible = "hisilicon,hi3798cv200-perictrl", "syscon",
-                            "simple-mfd";
-               reg = <0x8a20000 0x1000>;
-               #address-cells = <1>;
-               #size-cells = <1>;
-       };
-
------------------------------------------------------------------------
-Hisilicon Hi6220 system controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-sysctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
-  under this controller and this property must be present.
-
-Hisilicon designs this controller as one of the system controllers,
-its main functions are the same as Hisilicon system controller, but
-the register offset of some core modules are different.
-
-Example:
-       /*for Hi6220*/
-       sys_ctrl: sys_ctrl@f7030000 {
-               compatible = "hisilicon,hi6220-sysctrl", "syscon";
-               reg = <0x0 0xf7030000 0x0 0x2000>;
-               #clock-cells = <1>;
-       };
-
-
-Hisilicon Hi6220 Power Always ON domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-aoctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
-  under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power always
-on domain for mobile platform.
-
-Example:
-       /*for Hi6220*/
-       ao_ctrl: ao_ctrl@f7800000 {
-               compatible = "hisilicon,hi6220-aoctrl", "syscon";
-               reg = <0x0 0xf7800000 0x0 0x2000>;
-               #clock-cells = <1>;
-       };
-
-
-Hisilicon Hi6220 Media domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-mediactrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, many clock registers are defined
-  under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the multimedia
-domain(e.g. codec, G3D ...) for mobile platform.
-
-Example:
-       /*for Hi6220*/
-       media_ctrl: media_ctrl@f4410000 {
-               compatible = "hisilicon,hi6220-mediactrl", "syscon";
-               reg = <0x0 0xf4410000 0x0 0x1000>;
-               #clock-cells = <1>;
-       };
-
-
-Hisilicon Hi6220 Power Management domain controller
-
-Required properties:
-- compatible : "hisilicon,hi6220-pmctrl"
-- reg : Register address and size
-- #clock-cells: should be set to 1, some clock registers are define
-  under this controller and this property must be present.
-
-Hisilicon designs this system controller to control the power management
-domain for mobile platform.
-
-Example:
-       /*for Hi6220*/
-       pm_ctrl: pm_ctrl@f7032000 {
-               compatible = "hisilicon,hi6220-pmctrl", "syscon";
-               reg = <0x0 0xf7032000 0x0 0x1000>;
-               #clock-cells = <1>;
-       };
-
------------------------------------------------------------------------
-Hisilicon HiP01 system controller
-
-Required properties:
-- compatible : "hisilicon,hip01-sysctrl"
-- reg : Register address and size
-
-The HiP01 system controller is mostly compatible with hisilicon
-system controller,but it has some specific control registers for
-HIP01 SoC family, such as slave core boot, and also some same
-registers located at different offset.
-
-Example:
-
-       /* for hip01-ca9x2 */
-       sysctrl: system-controller@10000000 {
-               compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
-               reg = <0x10000000 0x1000>;
-               reboot-offset = <0x4>;
-       };
-
------------------------------------------------------------------------
-Hisilicon CPU controller
-
-Required properties:
-- compatible : "hisilicon,cpuctrl"
-- reg : Register address and size
-
-The clock registers and power registers of secondary cores are defined
-in CPU controller, especially in HIX5HD2 SoC.
-
------------------------------------------------------------------------
-PCTRL: Peripheral misc control register
-
-Required Properties:
-- compatible: "hisilicon,pctrl"
-- reg: Address and size of pctrl.
-
-Example:
-
-       /* for Hi3620 */
-       pctrl: pctrl@fca09000 {
-               compatible = "hisilicon,pctrl";
-               reg = <0xfca09000 0x1000>;
-       };
-
------------------------------------------------------------------------
-Fabric:
-
-Required Properties:
-- compatible: "hisilicon,hip04-fabric";
-- reg: Address and size of Fabric
-
------------------------------------------------------------------------
-Bootwrapper boot method (software protocol on SMP):
-
-Required Properties:
-- compatible: "hisilicon,hip04-bootwrapper";
-- boot-method: Address and size of boot method.
-  [0]: bootwrapper physical address
-  [1]: bootwrapper size
-  [2]: relocation physical address
-  [3]: relocation size