Merge tag 'x86-fsgsbase-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 fsgsbase from Thomas Gleixner:
 "Support for FSGSBASE. Almost 5 years after the first RFC to support
  it, this has been brought into a shape which is maintainable and
  actually works.

  This final version was done by Sasha Levin who took it up after Intel
  dropped the ball. Sasha discovered that the SGX (sic!) offerings out
  there ship rogue kernel modules enabling FSGSBASE behind the kernels
  back which opens an instantanious unpriviledged root hole.

  The FSGSBASE instructions provide a considerable speedup of the
  context switch path and enable user space to write GSBASE without
  kernel interaction. This enablement requires careful handling of the
  exception entries which go through the paranoid entry path as they
  can no longer rely on the assumption that user GSBASE is positive (as
  enforced via prctl() on non FSGSBASE enabled systemn).

  All other entries (syscalls, interrupts and exceptions) can still just
  utilize SWAPGS unconditionally when the entry comes from user space.
  Converting these entries to use FSGSBASE has no benefit as SWAPGS is
  only marginally slower than WRGSBASE and locating and retrieving the
  kernel GSBASE value is not a free operation either. The real benefit
  of RD/WRGSBASE is the avoidance of the MSR reads and writes.

  The changes come with appropriate selftests and have held up in field
  testing against the (sanitized) Graphene-SGX driver"

* tag 'x86-fsgsbase-2020-08-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (21 commits)
  x86/fsgsbase: Fix Xen PV support
  x86/ptrace: Fix 32-bit PTRACE_SETREGS vs fsbase and gsbase
  selftests/x86/fsgsbase: Add a missing memory constraint
  selftests/x86/fsgsbase: Fix a comment in the ptrace_write_gsbase test
  selftests/x86: Add a syscall_arg_fault_64 test for negative GSBASE
  selftests/x86/fsgsbase: Test ptracer-induced GS base write with FSGSBASE
  selftests/x86/fsgsbase: Test GS selector on ptracer-induced GS base write
  Documentation/x86/64: Add documentation for GS/FS addressing mode
  x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2
  x86/cpu: Enable FSGSBASE on 64bit by default and add a chicken bit
  x86/entry/64: Handle FSGSBASE enabled paranoid entry/exit
  x86/entry/64: Introduce the FIND_PERCPU_BASE macro
  x86/entry/64: Switch CR3 before SWAPGS in paranoid entry
  x86/speculation/swapgs: Check FSGSBASE in enabling SWAPGS mitigation
  x86/process/64: Use FSGSBASE instructions on thread copy and ptrace
  x86/process/64: Use FSBSBASE in switch_to() if available
  x86/process/64: Make save_fsgs_for_kvm() ready for FSGSBASE
  x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions
  x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions
  x86/cpu: Add 'unsafe_fsgsbase' to enable CR4.FSGSBASE
  ...

diff --cc Documentation/admin-guide/kernel-parameters.txt
Simple merge

diff --cc arch/x86/entry/entry_64.S
Simple merge

diff --cc arch/x86/include/asm/inst.h
index 438ccd4,d063841..bd7f024
--- 1/arch/x86/include/asm/inst.h
--- 2/arch/x86/include/asm/inst.h
+++ b/arch/x86/include/asm/inst.h
@@@ -143,6 -203,124 +143,21 @@@
        .macro MODRM mod opd1 opd2
        .byte \mod | (\opd1 & 7) | ((\opd2 & 7) << 3)
        .endm
 -      .macro PSHUFB_XMM xmm1 xmm2
 -      XMM_NUM pshufb_opd1 \xmm1
 -      XMM_NUM pshufb_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX pshufb_opd1 pshufb_opd2
 -      .byte 0x0f, 0x38, 0x00
 -      MODRM 0xc0 pshufb_opd1 pshufb_opd2
 -      .endm
 -
 -      .macro PCLMULQDQ imm8 xmm1 xmm2
 -      XMM_NUM clmul_opd1 \xmm1
 -      XMM_NUM clmul_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX clmul_opd1 clmul_opd2
 -      .byte 0x0f, 0x3a, 0x44
 -      MODRM 0xc0 clmul_opd1 clmul_opd2
 -      .byte \imm8
 -      .endm
 -
 -      .macro PEXTRD imm8 xmm gpr
 -      R32_NUM extrd_opd1 \gpr
 -      XMM_NUM extrd_opd2 \xmm
 -      PFX_OPD_SIZE
 -      PFX_REX extrd_opd1 extrd_opd2
 -      .byte 0x0f, 0x3a, 0x16
 -      MODRM 0xc0 extrd_opd1 extrd_opd2
 -      .byte \imm8
 -      .endm
 -
 -      .macro AESKEYGENASSIST rcon xmm1 xmm2
 -      XMM_NUM aeskeygen_opd1 \xmm1
 -      XMM_NUM aeskeygen_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aeskeygen_opd1 aeskeygen_opd2
 -      .byte 0x0f, 0x3a, 0xdf
 -      MODRM 0xc0 aeskeygen_opd1 aeskeygen_opd2
 -      .byte \rcon
 -      .endm
 -
 -      .macro AESIMC xmm1 xmm2
 -      XMM_NUM aesimc_opd1 \xmm1
 -      XMM_NUM aesimc_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aesimc_opd1 aesimc_opd2
 -      .byte 0x0f, 0x38, 0xdb
 -      MODRM 0xc0 aesimc_opd1 aesimc_opd2
 -      .endm
 -
 -      .macro AESENC xmm1 xmm2
 -      XMM_NUM aesenc_opd1 \xmm1
 -      XMM_NUM aesenc_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aesenc_opd1 aesenc_opd2
 -      .byte 0x0f, 0x38, 0xdc
 -      MODRM 0xc0 aesenc_opd1 aesenc_opd2
 -      .endm
 -
 -      .macro AESENCLAST xmm1 xmm2
 -      XMM_NUM aesenclast_opd1 \xmm1
 -      XMM_NUM aesenclast_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aesenclast_opd1 aesenclast_opd2
 -      .byte 0x0f, 0x38, 0xdd
 -      MODRM 0xc0 aesenclast_opd1 aesenclast_opd2
 -      .endm
 -
 -      .macro AESDEC xmm1 xmm2
 -      XMM_NUM aesdec_opd1 \xmm1
 -      XMM_NUM aesdec_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aesdec_opd1 aesdec_opd2
 -      .byte 0x0f, 0x38, 0xde
 -      MODRM 0xc0 aesdec_opd1 aesdec_opd2
 -      .endm
 -
 -      .macro AESDECLAST xmm1 xmm2
 -      XMM_NUM aesdeclast_opd1 \xmm1
 -      XMM_NUM aesdeclast_opd2 \xmm2
 -      PFX_OPD_SIZE
 -      PFX_REX aesdeclast_opd1 aesdeclast_opd2
 -      .byte 0x0f, 0x38, 0xdf
 -      MODRM 0xc0 aesdeclast_opd1 aesdeclast_opd2
 -      .endm
 -
 -      .macro MOVQ_R64_XMM opd1 opd2
 -      REG_TYPE movq_r64_xmm_opd1_type \opd1
 -      .if movq_r64_xmm_opd1_type == REG_TYPE_XMM
 -      XMM_NUM movq_r64_xmm_opd1 \opd1
 -      R64_NUM movq_r64_xmm_opd2 \opd2
 -      .else
 -      R64_NUM movq_r64_xmm_opd1 \opd1
 -      XMM_NUM movq_r64_xmm_opd2 \opd2
 -      .endif
 -      PFX_OPD_SIZE
 -      PFX_REX movq_r64_xmm_opd1 movq_r64_xmm_opd2 1
 -      .if movq_r64_xmm_opd1_type == REG_TYPE_XMM
 -      .byte 0x0f, 0x7e
 -      .else
 -      .byte 0x0f, 0x6e
 -      .endif
 -      MODRM 0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2
 -      .endm
 -
+ 
+ .macro RDPID opd
+       REG_TYPE rdpid_opd_type \opd
+       .if rdpid_opd_type == REG_TYPE_R64
+       R64_NUM rdpid_opd \opd
+       .else
+       R32_NUM rdpid_opd \opd
+       .endif
+       .byte 0xf3
+       .if rdpid_opd > 7
+       PFX_REX rdpid_opd 0
+       .endif
+       .byte 0x0f, 0xc7
+       MODRM 0xc0 rdpid_opd 0x7
+ .endm
  #endif
  
  #endif

diff --cc arch/x86/include/asm/processor.h
Simple merge

diff --cc arch/x86/kernel/cpu/bugs.c
Simple merge

diff --cc arch/x86/kernel/cpu/common.c
Simple merge

diff --cc arch/x86/kernel/process.c
Simple merge

diff --cc arch/x86/kernel/process_64.c
Simple merge

diff --cc arch/x86/kvm/vmx/vmx.c
Simple merge

diff --cc tools/testing/selftests/x86/Makefile
Simple merge

diff --cc tools/testing/selftests/x86/syscall_arg_fault.c
Simple merge