drm/i915: Implement Wa_1508744258
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 13 Jul 2021 00:38:51 +0000 (17:38 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Tue, 13 Jul 2021 16:57:40 +0000 (09:57 -0700)
Same bit was required for Wa_14012131227 in DG1 now it is also
required as Wa_1508744258 to TGL, RKL, DG1, ADL-S and ADL-P.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210713003854.143197-3-jose.souza@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c

index e5e3f82..c346229 100644 (file)
@@ -670,6 +670,13 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine,
               FF_MODE2_GS_TIMER_MASK,
               FF_MODE2_GS_TIMER_224,
               0);
+
+       /*
+        * Wa_14012131227:dg1
+        * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p
+        */
+       wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1,
+                    GEN9_RHWO_OPTIMIZATION_DISABLE);
 }
 
 static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,