drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 25 Apr 2019 16:29:05 +0000 (19:29 +0300)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Mon, 13 May 2019 10:45:51 +0000 (13:45 +0300)
commitda471250706e2f103a1627d1d279c9de44325993
tree2b82a7909c03f9c7be112dac2d2d1dab31715914
parent396dd8143bdd94bd1c358a228a631c8c895a1126
drm/i915: Fix fastset vs. pfit on/off on HSW EDP transcoder

On HSW the pipe A panel fitter lives inside the display power well,
and the input MUX for the EDP transcoder needs to be configured
appropriately to route the data through the power well as needed.
Changing the MUX setting is not allowed while the pipe is active,
so we need to force a full modeset whenever we need to change it.

Currently we may end up doing a fastset which won't change the
MUX settings, but it will drop the power well reference, and that
kills the pipe.

Cc: stable@vger.kernel.org
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: d19f958db23c ("drm/i915: Enable fastset for non-boot modesets.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425162906.5242-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
(cherry picked from commit 13b7648b7eab7e8259a2fb267b498bd9eba81ca0)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_pipe_crc.c