clk: rockchip: fix mmc get phase
authorJerome Brunet <jbrunet@baylibre.com>
Tue, 3 Mar 2020 19:29:56 +0000 (20:29 +0100)
committerStephen Boyd <sboyd@kernel.org>
Fri, 6 Mar 2020 20:06:01 +0000 (12:06 -0800)
commitd894992502474a6e84644012deb14a0280acbf96
tree84fa396ebf33c06c1117ca1b37f540935e8b03d1
parentc3944ec8c6df256ab480b56cb776f36df44b2ba5
clk: rockchip: fix mmc get phase

If the mmc clock has no rate, it can be assumed to be constant.
In such case, there is no measurable phase shift. Just return 0
in this case instead of returning an error.

Fixes: 2760878662a2 ("clk: Bail out when calculating phase fails during clk registration")
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20200303192956.64410-1-jbrunet@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/rockchip/clk-mmc-phase.c