x86/bugs: Rename _RDS to _SSBD
authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Wed, 9 May 2018 19:41:38 +0000 (21:41 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Wed, 9 May 2018 19:41:38 +0000 (21:41 +0200)
commit9f65fb29374ee37856dbad847b4e121aab72b510
treebe99b8bc2090f8c5b92f0c4be65eea4e6d6f1510
parentf21b53b20c754021935ea43364dbf53778eeba32
x86/bugs: Rename _RDS to _SSBD

Intel collateral will reference the SSB mitigation bit in IA32_SPEC_CTL[2]
as SSBD (Speculative Store Bypass Disable).

Hence changing it.

It is unclear yet what the MSR_IA32_ARCH_CAPABILITIES (0x10a) Bit(4) name
is going to be. Following the rename it would be SSBD_NO but that rolls out
to Speculative Store Bypass Disable No.

Also fixed the missing space in X86_FEATURE_AMD_SSBD.

[ tglx: Fixup x86_amd_rds_enable() and rds_tif_to_amd_ls_cfg() as well ]

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
arch/x86/include/asm/cpufeatures.h
arch/x86/include/asm/msr-index.h
arch/x86/include/asm/spec-ctrl.h
arch/x86/include/asm/thread_info.h
arch/x86/kernel/cpu/amd.c
arch/x86/kernel/cpu/bugs.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/intel.c
arch/x86/kernel/process.c
arch/x86/kvm/cpuid.c
arch/x86/kvm/vmx.c