RISC-V: KVM: Support sstc extension
authorAtish Patra <atishp@rivosinc.com>
Fri, 22 Jul 2022 16:50:47 +0000 (09:50 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 12 Aug 2022 14:43:57 +0000 (07:43 -0700)
commit8f5cb44b1bae8520c0705ce348b30ffb1fdda43a
tree4e80fff0b3baebf935b46b2aa13a2c62678754a6
parent9801002f76c63327cae6e90097d3d0afb1e1b562
RISC-V: KVM: Support sstc extension

Sstc extension allows the guest to program the vstimecmp CSR directly
instead of making an SBI call to the hypervisor to program the next
event. The timer interrupt is also directly injected to the guest by
the hardware in this case. To maintain backward compatibility, the
hypervisors also update the vstimecmp in an SBI set_time call if
the hardware supports it. Thus, the older kernels in guest also
take advantage of the sstc extension.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/all/CAAhSdy2mb6wyqy0NAn9BcTWKMYEc0Z4zU3s3j7oNqBz6eDQ9sg@mail.gmail.com/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/kvm_vcpu_timer.h
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/vcpu.c
arch/riscv/kvm/vcpu_timer.c