clk: socfpga: stratix10: fix divider entry for the emac clocks
authorDinh Nguyen <dinguyen@kernel.org>
Fri, 7 Jun 2019 15:12:46 +0000 (10:12 -0500)
committerStephen Boyd <sboyd@kernel.org>
Tue, 25 Jun 2019 20:40:05 +0000 (13:40 -0700)
commit74684cce5ebd567b01e9bc0e9a1945c70a32f32f
tree1552891954ae19f3d8f91faaf556b62848cad58b
parentc8edb316b9bb6149193436dfbd240994733e27be
clk: socfpga: stratix10: fix divider entry for the emac clocks

The fixed dividers for the emac clocks should be 2 not 4.

Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/socfpga/clk-s10.c