net/mlx5: DR, Fix STEv1 incorrect L3 decapsulation padding
authorAlex Vesker <valex@nvidia.com>
Tue, 1 Jun 2021 15:10:06 +0000 (18:10 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 16 Jun 2021 22:36:45 +0000 (15:36 -0700)
commit65fb7d109abe3a1a9f1c2d3ba7e1249bc978d5f0
treee9626e7c285f47faf54dd74cda61135311bd0a55
parentc7d6c19b3bde66d7aebbe93e0f9e6d9ff57fc3fa
net/mlx5: DR, Fix STEv1 incorrect L3 decapsulation padding

Decapsulation L3 on small inner packets which are less than
64 Bytes was done incorrectly. In small packets there is an
extra padding added in L2 which should not be included in L3
length. The issue was that after decapL3 the extra L2 padding
caused an update on the L3 length.

To avoid this issue the new header is pushed to the beginning
of the packet (offset 0) which should not cause a HW reparse
and update the L3 length.

Fixes: c349b4137cfd ("net/mlx5: DR, Add STEv1 modify header logic")
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c