clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"
authorRobin Murphy <robin.murphy@arm.com>
Thu, 18 Jun 2020 17:56:29 +0000 (18:56 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 8 Jul 2020 14:22:10 +0000 (16:22 +0200)
commit465931e70881476a210d44705102ef8b6ee6cdb0
tree9a200771c875d8e1a5caa7d6eb09130da9faa0e2
parent0a7f99aad259d223ce69c03e792c7e2bfcf8c2c6
clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"

This reverts commit 82f4b67f018c88a7cc9337f0067ed3d6ec352648.

According to a subsequent revert in the vendor kernel, the original
change was based on unclear documentation and was in fact incorrect.

Emprically, my board's HS200 eMMC at 200MHZ apparently gets lucky with a
phase where this had no impact, but limiting max-frequency to 150MHz to
match the nominal capability of the I/O pins made it virtually unusable,
constantly throwing errors and retuning. With this revert, it starts
behaving perfectly at 150MHz too.

Fixes: 82f4b67f018c ("clk: rockchip: fix wrong mmc sample phase shift for rk3328")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/c80eb52e34c03f817586b6b7912fbd4e31be9079.1589475794.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3328.c