arm64: Workaround for Cortex-A55 erratum 1530923
authorSteven Price <steven.price@arm.com>
Mon, 16 Dec 2019 11:56:31 +0000 (11:56 +0000)
committerWill Deacon <will@kernel.org>
Thu, 16 Jan 2020 10:44:14 +0000 (10:44 +0000)
commit275fa0ea2cf7a84450f9c0ec0d9e7ec168ed2e2d
tree1a14bb38c7438a57a0f21266e1f81f5d0aed7186
parentdb0d46a58d34c7cd9d5ece98daf4b8afe3d770f8
arm64: Workaround for Cortex-A55 erratum 1530923

Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a
result of a speculative AT instruction. This may happen in the middle of
a guest world switch while the relevant VMSA configuration is in an
inconsistent state, leading to erroneous content being allocated into
TLBs.

The same workaround as is used for Cortex-A76 erratum 1165522
(WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this
mandates the use of VHE on affected parts.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Steven Price <steven.price@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/include/asm/kvm_hyp.h
arch/arm64/kernel/cpu_errata.c
arch/arm64/kvm/hyp/switch.c
arch/arm64/kvm/hyp/tlb.c