samples: ftrace: Add RISC-V support for SAMPLE_FTRACE_DIRECT[_MULTI]
[linux-2.6-microblaze.git] / samples / ftrace / ftrace-direct-multi-modify.c
index 2e34983..f943e40 100644 (file)
@@ -22,6 +22,47 @@ void my_direct_func2(unsigned long ip)
 extern void my_tramp1(void *);
 extern void my_tramp2(void *);
 
+#ifdef CONFIG_RISCV
+#include <asm/asm.h>
+
+asm (
+"      .pushsection    .text, \"ax\", @progbits\n"
+"      .type           my_tramp1, @function\n"
+"      .globl          my_tramp1\n"
+"   my_tramp1:\n"
+"       addi   sp,sp,-3*"SZREG"\n"
+"       "REG_S"        a0,0*"SZREG"(sp)\n"
+"       "REG_S"        t0,1*"SZREG"(sp)\n"
+"       "REG_S"        ra,2*"SZREG"(sp)\n"
+"       mv     a0,t0\n"
+"       call   my_direct_func1\n"
+"       "REG_L"        a0,0*"SZREG"(sp)\n"
+"       "REG_L"        t0,1*"SZREG"(sp)\n"
+"       "REG_L"        ra,2*"SZREG"(sp)\n"
+"       addi   sp,sp,3*"SZREG"\n"
+"      jr      t0\n"
+"      .size           my_tramp1, .-my_tramp1\n"
+
+"      .type           my_tramp2, @function\n"
+"      .globl          my_tramp2\n"
+"   my_tramp2:\n"
+"       addi   sp,sp,-3*"SZREG"\n"
+"       "REG_S"        a0,0*"SZREG"(sp)\n"
+"       "REG_S"        t0,1*"SZREG"(sp)\n"
+"       "REG_S"        ra,2*"SZREG"(sp)\n"
+"       mv     a0,t0\n"
+"       call   my_direct_func2\n"
+"       "REG_L"        a0,0*"SZREG"(sp)\n"
+"       "REG_L"        t0,1*"SZREG"(sp)\n"
+"       "REG_L"        ra,2*"SZREG"(sp)\n"
+"       addi   sp,sp,3*"SZREG"\n"
+"      jr      t0\n"
+"      .size           my_tramp2, .-my_tramp2\n"
+"      .popsection\n"
+);
+
+#endif /* CONFIG_RISCV */
+
 #ifdef CONFIG_X86_64
 
 #include <asm/ibt.h>