Merge tag 'dmaengine-5.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul...

[linux-2.6-microblaze.git] / include / linux / dmaengine.h

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index abd8cff..6fbd5c9 100644 (file)
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -39,6 +39,7 @@ enum dma_status {
        DMA_IN_PROGRESS,
        DMA_PAUSED,
        DMA_ERROR,
+       DMA_OUT_OF_ORDER,
 };
 
 /**
@@ -61,6 +62,7 @@ enum dma_transaction_type {
        DMA_SLAVE,
        DMA_CYCLIC,
        DMA_INTERLEAVE,
+       DMA_COMPLETION_NO_ORDER,
        DMA_REPEAT,
        DMA_LOAD_EOT,
 /* last transaction type for creation of the capabilities mask */
@@ -164,7 +166,7 @@ struct dma_interleaved_template {
  * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
  *  this transaction
  * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client
- *  acknowledges receipt, i.e. has has a chance to establish any dependency
+ *  acknowledges receipt, i.e. has a chance to establish any dependency
  *  chains
  * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q
  * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P
@@ -479,7 +481,11 @@ enum dma_residue_granularity {
  *     Since the enum dma_transfer_direction is not defined as bit flag for
  *     each type, the dma controller should set BIT(<TYPE>) and same
  *     should be checked by controller as well
+ * @min_burst: min burst capability per-transfer
  * @max_burst: max burst capability per-transfer
+ * @max_sg_burst: max number of SG list entries executed in a single burst
+ *     DMA tansaction with no software intervention for reinitialization.
+ *     Zero value means unlimited number of entries.
  * @cmd_pause: true, if pause is supported (i.e. for reading residue or
  *            for resume later)
  * @cmd_resume: true, if resume is supported
@@ -492,7 +498,9 @@ struct dma_slave_caps {
        u32 src_addr_widths;
        u32 dst_addr_widths;
        u32 directions;
+       u32 min_burst;
        u32 max_burst;
+       u32 max_sg_burst;
        bool cmd_pause;
        bool cmd_resume;
        bool cmd_terminate;
@@ -783,7 +791,11 @@ struct dma_filter {
  *     Since the enum dma_transfer_direction is not defined as bit flag for
  *     each type, the dma controller should set BIT(<TYPE>) and same
  *     should be checked by controller as well
+ * @min_burst: min burst capability per-transfer
  * @max_burst: max burst capability per-transfer
+ * @max_sg_burst: max number of SG list entries executed in a single burst
+ *     DMA tansaction with no software intervention for reinitialization.
+ *     Zero value means unlimited number of entries.
  * @residue_granularity: granularity of the transfer residue reported
  *     by tx_status
  * @device_alloc_chan_resources: allocate resources and return the
@@ -803,6 +815,8 @@ struct dma_filter {
  *     be called after period_len bytes have been transferred.
  * @device_prep_interleaved_dma: Transfer expression in a generic way.
  * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address
+ * @device_caps: May be used to override the generic DMA slave capabilities
+ *     with per-channel specific ones
  * @device_config: Pushes a new configuration to a channel, return 0 or an error
  *     code
  * @device_pause: Pauses any transfer happening on a channel. Returns
@@ -853,7 +867,9 @@ struct dma_device {
        u32 src_addr_widths;
        u32 dst_addr_widths;
        u32 directions;
+       u32 min_burst;
        u32 max_burst;
+       u32 max_sg_burst;
        bool descriptor_reuse;
        enum dma_residue_granularity residue_granularity;
 
@@ -901,6 +917,8 @@ struct dma_device {
                struct dma_chan *chan, dma_addr_t dst, u64 data,
                unsigned long flags);
 
+       void (*device_caps)(struct dma_chan *chan,
+                           struct dma_slave_caps *caps);
        int (*device_config)(struct dma_chan *chan,
                             struct dma_slave_config *config);
        int (*device_pause)(struct dma_chan *chan);