Merge branch 'misc.namei' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[linux-2.6-microblaze.git] / drivers / pci / controller / dwc / Kconfig

diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index 423d358..76c0a63 100644 (file)
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -214,6 +214,17 @@ config PCIE_ARTPEC6_EP
          Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
          endpoint mode. This uses the DesignWare core.
 
+config PCIE_ROCKCHIP_DW_HOST
+       bool "Rockchip DesignWare PCIe controller"
+       select PCIE_DW
+       select PCIE_DW_HOST
+       depends on PCI_MSI_IRQ_DOMAIN
+       depends on ARCH_ROCKCHIP || COMPILE_TEST
+       depends on OF
+       help
+         Enables support for the DesignWare PCIe controller in the
+         Rockchip SoC except RK3399.
+
 config PCIE_INTEL_GW
        bool "Intel Gateway PCIe host controller support"
        depends on OF && (X86 || COMPILE_TEST)
@@ -225,6 +236,34 @@ config PCIE_INTEL_GW
          The PCIe controller uses the DesignWare core plus Intel-specific
          hardware wrappers.
 
+config PCIE_KEEMBAY
+       bool
+
+config PCIE_KEEMBAY_HOST
+       bool "Intel Keem Bay PCIe controller - Host mode"
+       depends on ARCH_KEEMBAY || COMPILE_TEST
+       depends on PCI && PCI_MSI_IRQ_DOMAIN
+       select PCIE_DW_HOST
+       select PCIE_KEEMBAY
+       help
+         Say 'Y' here to enable support for the PCIe controller in Keem Bay
+         to work in host mode.
+         The PCIe controller is based on DesignWare Hardware and uses
+         DesignWare core functions.
+
+config PCIE_KEEMBAY_EP
+       bool "Intel Keem Bay PCIe controller - Endpoint mode"
+       depends on ARCH_KEEMBAY || COMPILE_TEST
+       depends on PCI && PCI_MSI_IRQ_DOMAIN
+       depends on PCI_ENDPOINT
+       select PCIE_DW_EP
+       select PCIE_KEEMBAY
+       help
+         Say 'Y' here to enable support for the PCIe controller in Keem Bay
+         to work in endpoint mode.
+         The PCIe controller is based on DesignWare Hardware and uses
+         DesignWare core functions.
+
 config PCIE_KIRIN
        depends on OF && (ARM64 || COMPILE_TEST)
        bool "HiSilicon Kirin series SoCs PCIe controllers"
@@ -286,6 +325,15 @@ config PCIE_TEGRA194_EP
          in order to enable device-specific features PCIE_TEGRA194_EP must be
          selected. This uses the DesignWare core.
 
+config PCIE_VISCONTI_HOST
+       bool "Toshiba Visconti PCIe controllers"
+       depends on ARCH_VISCONTI || COMPILE_TEST
+       depends on PCI_MSI_IRQ_DOMAIN
+       select PCIE_DW_HOST
+       help
+         Say Y here if you want PCIe controller support on Toshiba Visconti SoC.
+         This driver supports TMPV7708 SoC.
+
 config PCIE_UNIPHIER
        bool "Socionext UniPhier PCIe host controllers"
        depends on ARCH_UNIPHIER || COMPILE_TEST