Merge tag 'char-misc-5.15-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git...

[linux-2.6-microblaze.git] / drivers / misc / habanalabs / gaudi / gaudi_security.c

diff --git a/drivers/misc/habanalabs/gaudi/gaudi_security.c b/drivers/misc/habanalabs/gaudi/gaudi_security.c
index 9a706c5..cb265c0 100644 (file)
--- a/drivers/misc/habanalabs/gaudi/gaudi_security.c
+++ b/drivers/misc/habanalabs/gaudi/gaudi_security.c
@@ -1448,7 +1448,7 @@ static void gaudi_init_dma_protection_bits(struct hl_device *hdev)
        u32 pb_addr, mask;
        u8 word_offset;
 
-       if (hdev->asic_prop.fw_security_disabled) {
+       if (!hdev->asic_prop.fw_security_enabled) {
                gaudi_pb_set_block(hdev, mmDMA_IF_E_S_BASE);
                gaudi_pb_set_block(hdev, mmDMA_IF_E_S_DOWN_CH0_BASE);
                gaudi_pb_set_block(hdev, mmDMA_IF_E_S_DOWN_CH1_BASE);
@@ -9135,7 +9135,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        u32 pb_addr, mask;
        u8 word_offset;
 
-       if (hdev->asic_prop.fw_security_disabled) {
+       if (!hdev->asic_prop.fw_security_enabled) {
                gaudi_pb_set_block(hdev, mmTPC0_E2E_CRED_BASE);
                gaudi_pb_set_block(hdev, mmTPC1_E2E_CRED_BASE);
                gaudi_pb_set_block(hdev, mmTPC2_E2E_CRED_BASE);
@@ -9559,6 +9559,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC0_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC0_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC0_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC0_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC0_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC0_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -10013,6 +10014,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC1_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC1_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC1_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC1_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC1_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC1_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC1_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -10466,6 +10468,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC2_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC2_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC2_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC2_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC2_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC2_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC2_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -10919,6 +10922,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC3_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC3_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC3_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC3_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC3_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC3_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC3_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -11372,6 +11376,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC4_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC4_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC4_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC4_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC4_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC4_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC4_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -11825,6 +11830,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC5_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC5_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC5_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC5_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC5_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC5_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -12280,6 +12286,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC6_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC6_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC6_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC6_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC6_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC6_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC6_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -12735,6 +12742,7 @@ static void gaudi_init_tpc_protection_bits(struct hl_device *hdev)
        mask |= 1U << ((mmTPC7_CFG_CFG_BASE_ADDRESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC7_CFG_CFG_SUBTRACT_VALUE & 0x7F) >> 2);
        mask |= 1U << ((mmTPC7_CFG_TPC_STALL & 0x7F) >> 2);
+       mask |= 1U << ((mmTPC7_CFG_ICACHE_BASE_ADDERESS_HIGH & 0x7F) >> 2);
        mask |= 1U << ((mmTPC7_CFG_RD_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC7_CFG_WR_RATE_LIMIT & 0x7F) >> 2);
        mask |= 1U << ((mmTPC7_CFG_MSS_CONFIG & 0x7F) >> 2);
@@ -12818,7 +12826,7 @@ static void gaudi_init_protection_bits(struct hl_device *hdev)
         * secured
         */
 
-       if (hdev->asic_prop.fw_security_disabled) {
+       if (!hdev->asic_prop.fw_security_enabled) {
                gaudi_pb_set_block(hdev, mmIF_E_PLL_BASE);
                gaudi_pb_set_block(hdev, mmMESH_W_PLL_BASE);
                gaudi_pb_set_block(hdev, mmSRAM_W_PLL_BASE);
@@ -13023,7 +13031,7 @@ void gaudi_init_security(struct hl_device *hdev)
         * property configuration of MME SBAB and ACC to be non-privileged and
         * non-secured
         */
-       if (hdev->asic_prop.fw_security_disabled) {
+       if (!hdev->asic_prop.fw_security_enabled) {
                WREG32(mmMME0_SBAB_PROT, 0x2);
                WREG32(mmMME0_ACC_PROT, 0x2);
                WREG32(mmMME1_SBAB_PROT, 0x2);
@@ -13032,11 +13040,12 @@ void gaudi_init_security(struct hl_device *hdev)
                WREG32(mmMME2_ACC_PROT, 0x2);
                WREG32(mmMME3_SBAB_PROT, 0x2);
                WREG32(mmMME3_ACC_PROT, 0x2);
-       }
 
-       /* On RAZWI, 0 will be returned from RR and 0xBABA0BAD from PB */
-       if (hdev->asic_prop.fw_security_disabled)
+               /*
+                * On RAZWI, 0 will be returned from RR and 0xBABA0BAD from PB
+                */
                WREG32(0xC01B28, 0x1);
+       }
 
        gaudi_init_range_registers_lbw(hdev);