drm/i915/uapi: introduce drm_i915_gem_create_ext
[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / i915_drv.c
index 43ac738..f50f7b4 100644 (file)
@@ -272,7 +272,7 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
        pre |= IS_HSW_EARLY_SDV(dev_priv);
        pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0);
        pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST);
-       pre |= IS_KBL_GT_REVID(dev_priv, 0, KBL_REVID_A0);
+       pre |= IS_KBL_GT_STEP(dev_priv, 0, STEP_A0);
        pre |= IS_GLK_REVID(dev_priv, 0, GLK_REVID_A2);
 
        if (pre) {
@@ -306,6 +306,7 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
                return -ENODEV;
 
        intel_device_info_subplatform_init(dev_priv);
+       intel_step_init(dev_priv);
 
        intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);
        intel_uncore_init_early(&dev_priv->uncore, dev_priv);
@@ -566,6 +567,10 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
 
        intel_gt_init_hw_early(&dev_priv->gt, &dev_priv->ggtt);
 
+       ret = intel_gt_probe_lmem(&dev_priv->gt);
+       if (ret)
+               goto err_mem_regions;
+
        ret = i915_ggtt_enable_hw(dev_priv);
        if (ret) {
                drm_err(&dev_priv->drm, "failed to enable GGTT\n");
@@ -763,8 +768,6 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent)
        memcpy(device_info, match_info, sizeof(*device_info));
        RUNTIME_INFO(i915)->device_id = pdev->device;
 
-       BUG_ON(device_info->gen > BITS_PER_TYPE(device_info->gen_mask));
-
        return i915;
 }
 
@@ -791,7 +794,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                return PTR_ERR(i915);
 
        /* Disable nuclear pageflip by default on pre-ILK */
-       if (!i915->params.nuclear_pageflip && match_info->gen < 5)
+       if (!i915->params.nuclear_pageflip && match_info->graphics_ver < 5)
                i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
        /*
@@ -803,7 +806,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                if (INTEL_GEN(i915) >= 9 && i915_selftest.live < 0 &&
                    i915->params.fake_lmem_start) {
                        mkwrite_device_info(i915)->memory_regions =
-                               REGION_SMEM | REGION_LMEM | REGION_STOLEN;
+                               REGION_SMEM | REGION_LMEM | REGION_STOLEN_SMEM;
                        GEM_BUG_ON(!HAS_LMEM(i915));
                }
        }
@@ -1691,7 +1694,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
        DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, drm_noop, DRM_AUTH),
        DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF_DRV(I915_GEM_INIT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-       DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer_ioctl, DRM_AUTH),
+       DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, drm_invalid_op, DRM_AUTH),
        DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2_WR, i915_gem_execbuffer2_ioctl, DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_reject_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_reject_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
@@ -1702,6 +1705,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
        DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
        DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_RENDER_ALLOW),
+       DRM_IOCTL_DEF_DRV(I915_GEM_CREATE_EXT, i915_gem_create_ext_ioctl, DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_RENDER_ALLOW),
        DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_RENDER_ALLOW),