drm/i915/gem: Typecheck page lookups

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / gem / selftests / i915_gem_mman.c

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 7f63538..5627990 100644 (file)
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -97,11 +97,11 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
        struct drm_i915_private *i915 = to_i915(obj->base.dev);
        struct i915_gtt_view view;
        struct i915_vma *vma;
+       unsigned long offset;
        unsigned long page;
        u32 __iomem *io;
        struct page *p;
        unsigned int n;
-       u64 offset;
        u32 *cpu;
        int err;
 
@@ -158,7 +158,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
        cpu = kmap(p) + offset_in_page(offset);
        drm_clflush_virt_range(cpu, sizeof(*cpu));
        if (*cpu != (u32)page) {
-               pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
+               pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%lu + %u [0x%lx]) of 0x%x, found 0x%x\n",
                       page, n,
                       view.partial.offset,
                       view.partial.size,
@@ -214,10 +214,10 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj,
        for_each_prime_number_from(page, 1, npages) {
                struct i915_gtt_view view =
                        compute_partial_view(obj, page, MIN_CHUNK_PAGES);
+               unsigned long offset;
                u32 __iomem *io;
                struct page *p;
                unsigned int n;
-               u64 offset;
                u32 *cpu;
 
                GEM_BUG_ON(view.partial.size > nreal);
@@ -254,7 +254,7 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj,
                cpu = kmap(p) + offset_in_page(offset);
                drm_clflush_virt_range(cpu, sizeof(*cpu));
                if (*cpu != (u32)page) {
-                       pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
+                       pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%lu + %u [0x%lx]) of 0x%x, found 0x%x\n",
                               page, n,
                               view.partial.offset,
                               view.partial.size,