drm/i915/pool: constrain pool objects by mapping type

[linux-2.6-microblaze.git] / drivers / gpu / drm / i915 / gem / i915_gem_execbuffer.c

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index b07dc11..d70ca36 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -15,6 +15,7 @@
 
 #include "gem/i915_gem_ioctls.h"
 #include "gt/intel_context.h"
+#include "gt/intel_gpu_commands.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_buffer_pool.h"
 #include "gt/intel_gt_pm.h"
@@ -382,7 +383,7 @@ eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
                return true;
 
        if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
-           (vma->node.start + vma->node.size - 1) >> 32)
+           (vma->node.start + vma->node.size + 4095) >> 32)
                return true;
 
        if (flags & __EXEC_OBJECT_NEEDS_MAP &&
@@ -534,8 +535,6 @@ eb_add_vma(struct i915_execbuffer *eb,
        struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
        struct eb_vma *ev = &eb->vma[i];
 
-       GEM_BUG_ON(i915_vma_is_closed(vma));
-
        ev->vma = vma;
        ev->exec = entry;
        ev->flags = entry->flags;
@@ -1046,7 +1045,7 @@ static void reloc_gpu_flush(struct i915_execbuffer *eb, struct reloc_cache *cach
        GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32));
        cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END;
 
-       __i915_gem_object_flush_map(obj, 0, sizeof(u32) * (cache->rq_size + 1));
+       i915_gem_object_flush_map(obj);
        i915_gem_object_unpin_map(obj);
 
        intel_gt_chipset_flush(cache->rq->engine->gt);
@@ -1277,7 +1276,10 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
        int err;
 
        if (!pool) {
-               pool = intel_gt_get_buffer_pool(engine->gt, PAGE_SIZE);
+               pool = intel_gt_get_buffer_pool(engine->gt, PAGE_SIZE,
+                                               cache->has_llc ?
+                                               I915_MAP_WB :
+                                               I915_MAP_WC);
                if (IS_ERR(pool))
                        return PTR_ERR(pool);
        }
@@ -1287,15 +1289,14 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
        if (err)
                goto err_pool;
 
-       cmd = i915_gem_object_pin_map(pool->obj,
-                                     cache->has_llc ?
-                                     I915_MAP_FORCE_WB :
-                                     I915_MAP_FORCE_WC);
+       cmd = i915_gem_object_pin_map(pool->obj, pool->type);
        if (IS_ERR(cmd)) {
                err = PTR_ERR(cmd);
                goto err_pool;
        }
 
+       memset32(cmd, 0, pool->obj->base.size / sizeof(u32));
+
        batch = i915_vma_instance(pool->obj, vma->vm, NULL);
        if (IS_ERR(batch)) {
                err = PTR_ERR(batch);
@@ -2457,7 +2458,8 @@ static int eb_parse(struct i915_execbuffer *eb)
                return -EINVAL;
 
        if (!pool) {
-               pool = intel_gt_get_buffer_pool(eb->engine->gt, len);
+               pool = intel_gt_get_buffer_pool(eb->engine->gt, len,
+                                               I915_MAP_WB);
                if (IS_ERR(pool))
                        return PTR_ERR(pool);
                eb->batch_pool = pool;
@@ -2533,6 +2535,9 @@ static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch)
 {
        int err;
 
+       if (intel_context_nopreempt(eb->context))
+               __set_bit(I915_FENCE_FLAG_NOPREEMPT, &eb->request->fence.flags);
+
        err = eb_move_to_gpu(eb);
        if (err)
                return err;
@@ -2573,15 +2578,12 @@ static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch)
                        return err;
        }
 
-       if (intel_context_nopreempt(eb->context))
-               __set_bit(I915_FENCE_FLAG_NOPREEMPT, &eb->request->fence.flags);
-
        return 0;
 }
 
 static int num_vcs_engines(const struct drm_i915_private *i915)
 {
-       return hweight64(VDBOX_MASK(&i915->gt));
+       return hweight_long(VDBOX_MASK(&i915->gt));
 }
 
 /*