drm/etnaviv: use a 32 bit mask as coherent DMA mask

[linux-2.6-microblaze.git] / drivers / gpu / drm / etnaviv / etnaviv_drv.c

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
index 54eb653..0b756ec 100644 (file)
--- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c
@@ -613,6 +613,24 @@ static int etnaviv_pdev_probe(struct platform_device *pdev)
                        component_match_add(dev, &match, compare_str, names[i]);
        }
 
+       /*
+        * PTA and MTLB can have 40 bit base addresses, but
+        * unfortunately, an entry in the MTLB can only point to a
+        * 32 bit base address of a STLB. Moreover, to initialize the
+        * MMU we need a command buffer with a 32 bit address because
+        * without an MMU there is only an indentity mapping between
+        * the internal 32 bit addresses and the bus addresses.
+        *
+        * To make things easy, we set the dma_coherent_mask to 32
+        * bit to make sure we are allocating the command buffers and
+        * TLBs in the lower 4 GiB address space.
+        */
+       if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)) ||
+           dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
+               dev_dbg(&pdev->dev, "No suitable DMA available\n");
+               return -ENODEV;
+       }
+
        /*
         * Apply the same DMA configuration to the virtual etnaviv
         * device as the GPU we found. This assumes that all Vivante
@@ -671,8 +689,6 @@ static int __init etnaviv_init(void)
                        of_node_put(np);
                        goto unregister_platform_driver;
                }
-               pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
-               pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
 
                ret = platform_device_add(pdev);
                if (ret) {