Merge tag 'drm-misc-next-fixes-2021-09-09' of git://anongit.freedesktop.org/drm/drm...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / pm / swsmu / smu11 / vangogh_ppt.c

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 18681dc..3a34214 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -256,7 +256,7 @@ static int vangogh_tables_init(struct smu_context *smu)
        return 0;
 
 err3_out:
-       kfree(smu_table->clocks_table);
+       kfree(smu_table->watermarks_table);
 err2_out:
        kfree(smu_table->gpu_metrics_table);
 err1_out:
@@ -592,28 +592,28 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
        switch (clk_type) {
        case SMU_OD_SCLK:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "%s:\n", "OD_SCLK");
-                       size += sprintf(buf + size, "0: %10uMhz\n",
+                       size = sysfs_emit(buf, "%s:\n", "OD_SCLK");
+                       size += sysfs_emit_at(buf, size, "0: %10uMhz\n",
                        (smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq);
-                       size += sprintf(buf + size, "1: %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
                        (smu->gfx_actual_soft_max_freq > 0) ? smu->gfx_actual_soft_max_freq : smu->gfx_default_soft_max_freq);
                }
                break;
        case SMU_OD_CCLK:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);
-                       size += sprintf(buf + size, "0: %10uMhz\n",
+                       size = sysfs_emit(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);
+                       size += sysfs_emit_at(buf, size, "0: %10uMhz\n",
                        (smu->cpu_actual_soft_min_freq > 0) ? smu->cpu_actual_soft_min_freq : smu->cpu_default_soft_min_freq);
-                       size += sprintf(buf + size, "1: %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
                        (smu->cpu_actual_soft_max_freq > 0) ? smu->cpu_actual_soft_max_freq : smu->cpu_default_soft_max_freq);
                }
                break;
        case SMU_OD_RANGE:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "%s:\n", "OD_RANGE");
-                       size += sprintf(buf + size, "SCLK: %7uMhz %10uMhz\n",
+                       size = sysfs_emit(buf, "%s:\n", "OD_RANGE");
+                       size += sysfs_emit_at(buf, size, "SCLK: %7uMhz %10uMhz\n",
                                smu->gfx_default_hard_min_freq, smu->gfx_default_soft_max_freq);
-                       size += sprintf(buf + size, "CCLK: %7uMhz %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "CCLK: %7uMhz %10uMhz\n",
                                smu->cpu_default_soft_min_freq, smu->cpu_default_soft_max_freq);
                }
                break;
@@ -656,14 +656,14 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu,
                                return ret;
                        if (!value)
                                continue;
-                       size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
+                       size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, value,
                                        cur_value == value ? "*" : "");
                        if (cur_value == value)
                                cur_value_match_level = true;
                }
 
                if (!cur_value_match_level)
-                       size += sprintf(buf + size, "   %uMhz *\n", cur_value);
+                       size += sysfs_emit_at(buf, size, "   %uMhz *\n", cur_value);
                break;
        default:
                break;
@@ -691,28 +691,28 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
        switch (clk_type) {
        case SMU_OD_SCLK:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "%s:\n", "OD_SCLK");
-                       size += sprintf(buf + size, "0: %10uMhz\n",
+                       size = sysfs_emit(buf, "%s:\n", "OD_SCLK");
+                       size += sysfs_emit_at(buf, size, "0: %10uMhz\n",
                        (smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq);
-                       size += sprintf(buf + size, "1: %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
                        (smu->gfx_actual_soft_max_freq > 0) ? smu->gfx_actual_soft_max_freq : smu->gfx_default_soft_max_freq);
                }
                break;
        case SMU_OD_CCLK:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);
-                       size += sprintf(buf + size, "0: %10uMhz\n",
+                       size = sysfs_emit(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);
+                       size += sysfs_emit_at(buf, size, "0: %10uMhz\n",
                        (smu->cpu_actual_soft_min_freq > 0) ? smu->cpu_actual_soft_min_freq : smu->cpu_default_soft_min_freq);
-                       size += sprintf(buf + size, "1: %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
                        (smu->cpu_actual_soft_max_freq > 0) ? smu->cpu_actual_soft_max_freq : smu->cpu_default_soft_max_freq);
                }
                break;
        case SMU_OD_RANGE:
                if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-                       size = sprintf(buf, "%s:\n", "OD_RANGE");
-                       size += sprintf(buf + size, "SCLK: %7uMhz %10uMhz\n",
+                       size = sysfs_emit(buf, "%s:\n", "OD_RANGE");
+                       size += sysfs_emit_at(buf, size, "SCLK: %7uMhz %10uMhz\n",
                                smu->gfx_default_hard_min_freq, smu->gfx_default_soft_max_freq);
-                       size += sprintf(buf + size, "CCLK: %7uMhz %10uMhz\n",
+                       size += sysfs_emit_at(buf, size, "CCLK: %7uMhz %10uMhz\n",
                                smu->cpu_default_soft_min_freq, smu->cpu_default_soft_max_freq);
                }
                break;
@@ -755,14 +755,14 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
                                return ret;
                        if (!value)
                                continue;
-                       size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
+                       size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, value,
                                        cur_value == value ? "*" : "");
                        if (cur_value == value)
                                cur_value_match_level = true;
                }
 
                if (!cur_value_match_level)
-                       size += sprintf(buf + size, "   %uMhz *\n", cur_value);
+                       size += sysfs_emit_at(buf, size, "   %uMhz *\n", cur_value);
                break;
        default:
                break;
@@ -1035,7 +1035,7 @@ static int vangogh_get_power_profile_mode(struct smu_context *smu,
                if (workload_type < 0)
                        continue;
 
-               size += sprintf(buf + size, "%2d %14s%s\n",
+               size += sysfs_emit_at(buf, size, "%2d %14s%s\n",
                        i, profile_name[i], (i == smu->power_profile_mode) ? "*" : " ");
        }
 
@@ -1869,7 +1869,7 @@ static int vangogh_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TAB
                } else {
                        if (smu->gfx_actual_hard_min_freq > smu->gfx_actual_soft_max_freq) {
                                dev_err(smu->adev->dev,
-                                       "The setting minimun sclk (%d) MHz is greater than the setting maximum sclk (%d) MHz\n",
+                                       "The setting minimum sclk (%d) MHz is greater than the setting maximum sclk (%d) MHz\n",
                                        smu->gfx_actual_hard_min_freq,
                                        smu->gfx_actual_soft_max_freq);
                                return -EINVAL;