Merge tag 'drm-misc-next-fixes-2021-09-09' of git://anongit.freedesktop.org/drm/drm...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / pm / powerplay / hwmgr / smu7_hwmgr.c

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index c0565a9..e7803ce 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -27,6 +27,9 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <asm/div64.h>
+#if IS_ENABLED(CONFIG_X86_64)
+#include <asm/intel-family.h>
+#endif
 #include <drm/amdgpu_drm.h>
 #include "ppatomctrl.h"
 #include "atombios.h"
@@ -1301,7 +1304,7 @@ static int smu7_start_dpm(struct pp_hwmgr *hwmgr)
                                (0 == smum_send_msg_to_smc(hwmgr,
                                                PPSMC_MSG_PCIeDPM_Disable,
                                                NULL)),
-                               "Failed to disble pcie DPM during DPM Start Function!",
+                               "Failed to disable pcie DPM during DPM Start Function!",
                                return -EINVAL);
        }
 
@@ -1733,6 +1736,17 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
        return result;
 }
 
+static bool intel_core_rkl_chk(void)
+{
+#if IS_ENABLED(CONFIG_X86_64)
+       struct cpuinfo_x86 *c = &cpu_data(0);
+
+       return (c->x86 == 6 && c->x86_model == INTEL_FAM6_ROCKETLAKE);
+#else
+       return false;
+#endif
+}
+
 static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 {
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -1758,7 +1772,8 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
 
        data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
        data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
-       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
+       data->pcie_dpm_key_disabled =
+               intel_core_rkl_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
        /* need to set voltage control types before EVV patching */
        data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
        data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
@@ -3212,7 +3227,7 @@ static int smu7_force_dpm_level(struct pp_hwmgr *hwmgr,
 
        if (!ret) {
                if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
-                       smu7_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
+                       smu7_fan_ctrl_set_fan_speed_pwm(hwmgr, 255);
                else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
                        smu7_fan_ctrl_reset_fan_speed_to_default(hwmgr);
        }
@@ -4001,7 +4016,7 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
                *((uint32_t *)value) = (uint32_t)convert_to_vddc(val_vid);
                return 0;
        default:
-               return -EINVAL;
+               return -EOPNOTSUPP;
        }
 }
 
@@ -4896,8 +4911,8 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
        struct smu7_odn_dpm_table *odn_table = &(data->odn_dpm_table);
        struct phm_odn_clock_levels *odn_sclk_table = &(odn_table->odn_core_clock_dpm_levels);
        struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels);
-       int i, now, size = 0;
-       uint32_t clock, pcie_speed;
+       int size = 0;
+       uint32_t i, now, clock, pcie_speed;
 
        switch (type) {
        case PP_SCLK:
@@ -4911,7 +4926,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
                now = i;
 
                for (i = 0; i < sclk_table->count; i++)
-                       size += sprintf(buf + size, "%d: %uMhz %s\n",
+                       size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
                                        i, sclk_table->dpm_levels[i].value / 100,
                                        (i == now) ? "*" : "");
                break;
@@ -4926,7 +4941,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
                now = i;
 
                for (i = 0; i < mclk_table->count; i++)
-                       size += sprintf(buf + size, "%d: %uMhz %s\n",
+                       size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n",
                                        i, mclk_table->dpm_levels[i].value / 100,
                                        (i == now) ? "*" : "");
                break;
@@ -4940,7 +4955,7 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
                now = i;
 
                for (i = 0; i < pcie_table->count; i++)
-                       size += sprintf(buf + size, "%d: %s %s\n", i,
+                       size += sysfs_emit_at(buf, size, "%d: %s %s\n", i,
                                        (pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x8" :
                                        (pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :
                                        (pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",
@@ -4948,32 +4963,32 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
                break;
        case OD_SCLK:
                if (hwmgr->od_enabled) {
-                       size = sprintf(buf, "%s:\n", "OD_SCLK");
+                       size = sysfs_emit(buf, "%s:\n", "OD_SCLK");
                        for (i = 0; i < odn_sclk_table->num_of_pl; i++)
-                               size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
+                               size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",
                                        i, odn_sclk_table->entries[i].clock/100,
                                        odn_sclk_table->entries[i].vddc);
                }
                break;
        case OD_MCLK:
                if (hwmgr->od_enabled) {
-                       size = sprintf(buf, "%s:\n", "OD_MCLK");
+                       size = sysfs_emit(buf, "%s:\n", "OD_MCLK");
                        for (i = 0; i < odn_mclk_table->num_of_pl; i++)
-                               size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
+                               size += sysfs_emit_at(buf, size, "%d: %10uMHz %10umV\n",
                                        i, odn_mclk_table->entries[i].clock/100,
                                        odn_mclk_table->entries[i].vddc);
                }
                break;
        case OD_RANGE:
                if (hwmgr->od_enabled) {
-                       size = sprintf(buf, "%s:\n", "OD_RANGE");
-                       size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
+                       size = sysfs_emit(buf, "%s:\n", "OD_RANGE");
+                       size += sysfs_emit_at(buf, size, "SCLK: %7uMHz %10uMHz\n",
                                data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,
                                hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
-                       size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",
+                       size += sysfs_emit_at(buf, size, "MCLK: %7uMHz %10uMHz\n",
                                data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,
                                hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);
-                       size += sprintf(buf + size, "VDDC: %7umV %11umV\n",
+                       size += sysfs_emit_at(buf, size, "VDDC: %7umV %11umV\n",
                                data->odn_dpm_table.min_vddc,
                                data->odn_dpm_table.max_vddc);
                }
@@ -4988,7 +5003,7 @@ static void smu7_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
 {
        switch (mode) {
        case AMD_FAN_CTRL_NONE:
-               smu7_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
+               smu7_fan_ctrl_set_fan_speed_pwm(hwmgr, 255);
                break;
        case AMD_FAN_CTRL_MANUAL:
                if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
@@ -5503,7 +5518,7 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
        if (!buf)
                return -EINVAL;
 
-       size += sprintf(buf + size, "%s %16s %16s %16s %16s %16s %16s %16s\n",
+       size += sysfs_emit_at(buf, size, "%s %16s %16s %16s %16s %16s %16s %16s\n",
                        title[0], title[1], title[2], title[3],
                        title[4], title[5], title[6], title[7]);
 
@@ -5511,7 +5526,7 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
 
        for (i = 0; i < len; i++) {
                if (i == hwmgr->power_profile_mode) {
-                       size += sprintf(buf + size, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",
+                       size += sysfs_emit_at(buf, size, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",
                        i, profile_name[i], "*",
                        data->current_profile_setting.sclk_up_hyst,
                        data->current_profile_setting.sclk_down_hyst,
@@ -5522,21 +5537,21 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
                        continue;
                }
                if (smu7_profiling[i].bupdate_sclk)
-                       size += sprintf(buf + size, "%3d %16s: %8d %16d %16d ",
+                       size += sysfs_emit_at(buf, size, "%3d %16s: %8d %16d %16d ",
                        i, profile_name[i], smu7_profiling[i].sclk_up_hyst,
                        smu7_profiling[i].sclk_down_hyst,
                        smu7_profiling[i].sclk_activity);
                else
-                       size += sprintf(buf + size, "%3d %16s: %8s %16s %16s ",
+                       size += sysfs_emit_at(buf, size, "%3d %16s: %8s %16s %16s ",
                        i, profile_name[i], "-", "-", "-");
 
                if (smu7_profiling[i].bupdate_mclk)
-                       size += sprintf(buf + size, "%16d %16d %16d\n",
+                       size += sysfs_emit_at(buf, size, "%16d %16d %16d\n",
                        smu7_profiling[i].mclk_up_hyst,
                        smu7_profiling[i].mclk_down_hyst,
                        smu7_profiling[i].mclk_activity);
                else
-                       size += sprintf(buf + size, "%16s %16s %16s\n",
+                       size += sysfs_emit_at(buf, size, "%16s %16s %16s\n",
                        "-", "-", "-");
        }
 
@@ -5692,8 +5707,8 @@ static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
        .set_max_fan_rpm_output = smu7_set_max_fan_rpm_output,
        .stop_thermal_controller = smu7_thermal_stop_thermal_controller,
        .get_fan_speed_info = smu7_fan_ctrl_get_fan_speed_info,
-       .get_fan_speed_percent = smu7_fan_ctrl_get_fan_speed_percent,
-       .set_fan_speed_percent = smu7_fan_ctrl_set_fan_speed_percent,
+       .get_fan_speed_pwm = smu7_fan_ctrl_get_fan_speed_pwm,
+       .set_fan_speed_pwm = smu7_fan_ctrl_set_fan_speed_pwm,
        .reset_fan_speed_to_default = smu7_fan_ctrl_reset_fan_speed_to_default,
        .get_fan_speed_rpm = smu7_fan_ctrl_get_fan_speed_rpm,
        .set_fan_speed_rpm = smu7_fan_ctrl_set_fan_speed_rpm,