drm/amd/display: cleanup of function pointer tables
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / dcn20 / dcn20_hwseq.h
index 3098f10..28aacee 100644 (file)
 #ifndef __DC_HWSS_DCN20_H__
 #define __DC_HWSS_DCN20_H__
 
-struct dc;
-
-void dcn20_hw_sequencer_construct(struct dc *dc);
-
-enum dc_status dcn20_enable_stream_timing(
-               struct pipe_ctx *pipe_ctx,
-               struct dc_state *context,
-               struct dc *dc);
-
-void dcn20_blank_pixel_data(
+bool dcn20_set_blend_lut(
+       struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
+bool dcn20_set_shaper_3dlut(
+       struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
+void dcn20_program_front_end_for_ctx(
                struct dc *dc,
-               struct pipe_ctx *pipe_ctx,
-               bool blank);
-
+               struct dc_state *context);
+void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
+bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
+                       const struct dc_plane_state *plane_state);
+bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
+                       const struct dc_stream_state *stream);
 void dcn20_program_output_csc(struct dc *dc,
                struct pipe_ctx *pipe_ctx,
                enum dc_color_space colorspace,
                uint16_t *matrix,
                int opp_id);
-
+void dcn20_enable_stream(struct pipe_ctx *pipe_ctx);
+void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx,
+               struct dc_link_settings *link_settings);
+void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_blank_pixel_data(
+               struct dc *dc,
+               struct pipe_ctx *pipe_ctx,
+               bool blank);
+void dcn20_pipe_control_lock(
+       struct dc *dc,
+       struct pipe_ctx *pipe,
+       bool lock);
+void dcn20_pipe_control_lock_global(
+               struct dc *dc,
+               struct pipe_ctx *pipe,
+               bool lock);
 void dcn20_prepare_bandwidth(
                struct dc *dc,
                struct dc_state *context);
-
 void dcn20_optimize_bandwidth(
                struct dc *dc,
                struct dc_state *context);
-
 bool dcn20_update_bandwidth(
                struct dc *dc,
                struct dc_state *context);
-
+void dcn20_reset_hw_ctx_wrap(
+               struct dc *dc,
+               struct dc_state *context);
+enum dc_status dcn20_enable_stream_timing(
+               struct pipe_ctx *pipe_ctx,
+               struct dc_state *context,
+               struct dc *dc);
+void dcn20_disable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_enable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_init_blank(
+               struct dc *dc,
+               struct timing_generator *tg);
+void dcn20_disable_vga(
+       struct dce_hwseq *hws);
+void dcn20_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx);
+void dcn20_enable_power_gating_plane(
+       struct dce_hwseq *hws,
+       bool enable);
+void dcn20_dpp_pg_control(
+               struct dce_hwseq *hws,
+               unsigned int dpp_inst,
+               bool power_on);
+void dcn20_hubp_pg_control(
+               struct dce_hwseq *hws,
+               unsigned int hubp_inst,
+               bool power_on);
+void dcn20_program_triple_buffer(
+       const struct dc *dc,
+       struct pipe_ctx *pipe_ctx,
+       bool enable_triple_buffer);
+void dcn20_enable_writeback(
+               struct dc *dc,
+               const struct dc_stream_status *stream_status,
+               struct dc_writeback_info *wb_info,
+               struct dc_state *context);
 void dcn20_disable_writeback(
                struct dc *dc,
                unsigned int dwb_pipe_inst);
-
-bool dcn20_hwss_wait_for_blank_complete(
-               struct output_pixel_processor *opp);
-
-bool dcn20_set_output_transfer_func(struct pipe_ctx *pipe_ctx,
-                       const struct dc_stream_state *stream);
-
-bool dcn20_set_input_transfer_func(struct pipe_ctx *pipe_ctx,
-                       const struct dc_plane_state *plane_state);
-
+void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
 bool dcn20_dmdata_status_done(struct pipe_ctx *pipe_ctx);
-
-void dcn20_set_dmdata_attributes(struct pipe_ctx *pipe_ctx);
-
-void dcn20_disable_stream(struct pipe_ctx *pipe_ctx);
-
-void dcn20_program_tripleBuffer(
-               const struct dc *dc,
-               struct pipe_ctx *pipe_ctx,
-               bool enableTripleBuffer);
-
-void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx);
-
-void dcn20_pipe_control_lock_global(
+void dcn20_program_dmdata_engine(struct pipe_ctx *pipe_ctx);
+void dcn20_init_vm_ctx(
+               struct dce_hwseq *hws,
                struct dc *dc,
-               struct pipe_ctx *pipe,
-               bool lock);
-void dcn20_setup_gsl_group_as_lock(const struct dc *dc,
-                               struct pipe_ctx *pipe_ctx,
-                               bool enable);
-void dcn20_dccg_init(struct dce_hwseq *hws);
-void dcn20_init_blank(
-          struct dc *dc,
-          struct timing_generator *tg);
-void dcn20_display_init(struct dc *dc);
-void dcn20_pipe_control_lock(
-       struct dc *dc,
-       struct pipe_ctx *pipe,
-       bool lock);
-void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
-void dcn20_enable_plane(
-       struct dc *dc,
-       struct pipe_ctx *pipe_ctx,
-       struct dc_state *context);
-bool dcn20_set_blend_lut(
-       struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
-bool dcn20_set_shaper_3dlut(
-       struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
-void dcn20_get_mpctree_visual_confirm_color(
+               struct dc_virtual_addr_space_config *va_config,
+               int vmid);
+void dcn20_set_flip_control_gsl(
                struct pipe_ctx *pipe_ctx,
-               struct tg_color *color);
+               bool flip_immediate);
+void dcn20_dsc_pg_control(
+               struct dce_hwseq *hws,
+               unsigned int dsc_inst,
+               bool power_on);
+void dcn20_fpga_init_hw(struct dc *dc);
+bool dcn20_wait_for_blank_complete(
+               struct output_pixel_processor *opp);
+void dcn20_dccg_init(struct dce_hwseq *hws);
+int dcn20_init_sys_ctx(struct dce_hwseq *hws,
+               struct dc *dc,
+               struct dc_phy_addr_space_config *pa_config);
+
 #endif /* __DC_HWSS_DCN20_H__ */
+