drm/amd/display: Multi-display underflow observed

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / display / dc / core / dc.c

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 7339d98..58eb0d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2625,26 +2625,6 @@ static void commit_planes_for_stream(struct dc *dc,
                }
        }
 
-       if (update_type != UPDATE_TYPE_FAST) {
-               // If changing VTG FP2: wait until back in vactive to program FP2
-               // Need to ensure that pipe unlock happens soon after to minimize race condition
-               for (i = 0; i < dc->res_pool->pipe_count; i++) {
-                       struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
-
-                       if (pipe_ctx->top_pipe || pipe_ctx->stream != stream)
-                               continue;
-
-                       if (!pipe_ctx->update_flags.bits.global_sync)
-                               continue;
-
-                       pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VBLANK);
-                       pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, CRTC_STATE_VACTIVE);
-
-                       pipe_ctx->stream_res.tg->funcs->set_vtg_params(
-                                       pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing, true);
-               }
-       }
-
        if ((update_type != UPDATE_TYPE_FAST) && dc->hwss.interdependent_update_lock)
                dc->hwss.interdependent_update_lock(dc, context, false);
        else