Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / psp_v11_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index bc133db..29bf9f0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -80,6 +80,9 @@ MODULE_FIRMWARE("amdgpu/beige_goby_ta.bin");
 /* For large FW files the time to complete can be very long */
 #define USBC_PD_POLLING_LIMIT_S 240
 
+/* Read USB-PD from LFB */
+#define GFX_CMD_USB_PD_USE_LFB 0x480
+
 static int psp_v11_0_init_microcode(struct psp_context *psp)
 {
        struct amdgpu_device *adev = psp->adev;
@@ -148,15 +151,15 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
                                goto out2;
 
                        ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
-                       adev->psp.ta_xgmi_ucode_version = le32_to_cpu(ta_hdr->ta_xgmi_ucode_version);
-                       adev->psp.ta_xgmi_ucode_size = le32_to_cpu(ta_hdr->ta_xgmi_size_bytes);
-                       adev->psp.ta_xgmi_start_addr = (uint8_t *)ta_hdr +
+                       adev->psp.xgmi.feature_version = le32_to_cpu(ta_hdr->xgmi.fw_version);
+                       adev->psp.xgmi.size_bytes = le32_to_cpu(ta_hdr->xgmi.size_bytes);
+                       adev->psp.xgmi.start_addr = (uint8_t *)ta_hdr +
                                le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
                        adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
-                       adev->psp.ta_ras_ucode_version = le32_to_cpu(ta_hdr->ta_ras_ucode_version);
-                       adev->psp.ta_ras_ucode_size = le32_to_cpu(ta_hdr->ta_ras_size_bytes);
-                       adev->psp.ta_ras_start_addr = (uint8_t *)adev->psp.ta_xgmi_start_addr +
-                               le32_to_cpu(ta_hdr->ta_ras_offset_bytes);
+                       adev->psp.ras.feature_version = le32_to_cpu(ta_hdr->ras.fw_version);
+                       adev->psp.ras.size_bytes = le32_to_cpu(ta_hdr->ras.size_bytes);
+                       adev->psp.ras.start_addr = (uint8_t *)adev->psp.xgmi.start_addr +
+                               le32_to_cpu(ta_hdr->ras.offset_bytes);
                }
                break;
        case CHIP_NAVI10:
@@ -183,17 +186,17 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
                                goto out2;
 
                        ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
-                       adev->psp.ta_hdcp_ucode_version = le32_to_cpu(ta_hdr->ta_hdcp_ucode_version);
-                       adev->psp.ta_hdcp_ucode_size = le32_to_cpu(ta_hdr->ta_hdcp_size_bytes);
-                       adev->psp.ta_hdcp_start_addr = (uint8_t *)ta_hdr +
+                       adev->psp.hdcp.feature_version = le32_to_cpu(ta_hdr->hdcp.fw_version);
+                       adev->psp.hdcp.size_bytes = le32_to_cpu(ta_hdr->hdcp.size_bytes);
+                       adev->psp.hdcp.start_addr = (uint8_t *)ta_hdr +
                                le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
 
                        adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
 
-                       adev->psp.ta_dtm_ucode_version = le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
-                       adev->psp.ta_dtm_ucode_size = le32_to_cpu(ta_hdr->ta_dtm_size_bytes);
-                       adev->psp.ta_dtm_start_addr = (uint8_t *)adev->psp.ta_hdcp_start_addr +
-                               le32_to_cpu(ta_hdr->ta_dtm_offset_bytes);
+                       adev->psp.dtm.feature_version = le32_to_cpu(ta_hdr->dtm.fw_version);
+                       adev->psp.dtm.size_bytes = le32_to_cpu(ta_hdr->dtm.size_bytes);
+                       adev->psp.dtm.start_addr = (uint8_t *)adev->psp.hdcp.start_addr +
+                               le32_to_cpu(ta_hdr->dtm.offset_bytes);
                }
                break;
        case CHIP_SIENNA_CICHLID:
@@ -284,7 +287,7 @@ static int psp_v11_0_bootloader_load_kdb(struct psp_context *psp)
                return ret;
 
        /* Copy PSP KDB binary to memory */
-       psp_copy_fw(psp, psp->kdb_start_addr, psp->kdb_bin_size);
+       psp_copy_fw(psp, psp->kdb.start_addr, psp->kdb.size_bytes);
 
        /* Provide the PSP KDB to bootloader */
        WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
@@ -315,7 +318,7 @@ static int psp_v11_0_bootloader_load_spl(struct psp_context *psp)
                return ret;
 
        /* Copy PSP SPL binary to memory */
-       psp_copy_fw(psp, psp->spl_start_addr, psp->spl_bin_size);
+       psp_copy_fw(psp, psp->spl.start_addr, psp->spl.size_bytes);
 
        /* Provide the PSP SPL to bootloader */
        WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
@@ -346,7 +349,7 @@ static int psp_v11_0_bootloader_load_sysdrv(struct psp_context *psp)
                return ret;
 
        /* Copy PSP System Driver binary to memory */
-       psp_copy_fw(psp, psp->sys_start_addr, psp->sys_bin_size);
+       psp_copy_fw(psp, psp->sys.start_addr, psp->sys.size_bytes);
 
        /* Provide the sys driver to bootloader */
        WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
@@ -380,7 +383,7 @@ static int psp_v11_0_bootloader_load_sos(struct psp_context *psp)
                return ret;
 
        /* Copy Secure OS binary to PSP memory */
-       psp_copy_fw(psp, psp->sos_start_addr, psp->sos_bin_size);
+       psp_copy_fw(psp, psp->sos.start_addr, psp->sos.size_bytes);
 
        /* Provide the PSP secure OS to bootloader */
        WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
@@ -753,44 +756,26 @@ static void psp_v11_0_ring_set_wptr(struct psp_context *psp, uint32_t value)
                WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_67, value);
 }
 
-static int psp_v11_0_load_usbc_pd_fw(struct psp_context *psp, dma_addr_t dma_addr)
+static int psp_v11_0_load_usbc_pd_fw(struct psp_context *psp, uint64_t fw_pri_mc_addr)
 {
        struct amdgpu_device *adev = psp->adev;
        uint32_t reg_status;
        int ret, i = 0;
 
-       /* Write lower 32-bit address of the PD Controller FW */
-       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, lower_32_bits(dma_addr));
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                            0x80000000, 0x80000000, false);
-       if (ret)
-               return ret;
-
-       /* Fireup interrupt so PSP can pick up the lower address */
-       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, 0x800000);
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                            0x80000000, 0x80000000, false);
-       if (ret)
-               return ret;
-
-       reg_status = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35);
-
-       if ((reg_status & 0xFFFF) != 0) {
-               DRM_ERROR("Lower address load failed - MP0_SMN_C2PMSG_35.Bits [15:0] = %02x...\n",
-                               reg_status & 0xFFFF);
-               return -EIO;
-       }
-
-       /* Write upper 32-bit address of the PD Controller FW */
-       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, upper_32_bits(dma_addr));
+       /*
+        * LFB address which is aligned to 1MB address and has to be
+        * right-shifted by 20 so that LFB address can be passed on a 32-bit C2P
+        * register
+        */
+       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, (fw_pri_mc_addr >> 20));
 
        ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
                             0x80000000, 0x80000000, false);
        if (ret)
                return ret;
 
-       /* Fireup interrupt so PSP can pick up the upper address */
-       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, 0x4000000);
+       /* Fireup interrupt so PSP can pick up the address */
+       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, (GFX_CMD_USB_PD_USE_LFB << 16));
 
        /* FW load takes very long time */
        do {
@@ -806,7 +791,7 @@ static int psp_v11_0_load_usbc_pd_fw(struct psp_context *psp, dma_addr_t dma_add
 done:
 
        if ((reg_status & 0xFFFF) != 0) {
-               DRM_ERROR("Upper address load failed - MP0_SMN_C2PMSG_35.Bits [15:0] = x%04x\n",
+               DRM_ERROR("Address load failed - MP0_SMN_C2PMSG_35.Bits [15:0] = 0x%04x\n",
                                reg_status & 0xFFFF);
                return -EIO;
        }