Merge tag 'amd-drm-next-5.14-2021-05-21' of https://gitlab.freedesktop.org/agd5f...

[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_vm.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index edc63d3..55991f3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -38,6 +38,7 @@
 #include "amdgpu_gmc.h"
 #include "amdgpu_xgmi.h"
 #include "amdgpu_dma_buf.h"
+#include "amdgpu_res_cursor.h"
 #include "kfd_svm.h"
 
 /**
@@ -1583,6 +1584,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
                        while (cursor.pfn < frag_start) {
                                amdgpu_vm_free_pts(adev, params->vm, &cursor);
                                amdgpu_vm_pt_next(adev, &cursor);
+                               params->table_freed = true;
                        }
 
                } else if (frag >= shift) {
@@ -1607,9 +1609,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
  * @last: last mapped entry
  * @flags: flags for the entries
  * @offset: offset into nodes and pages_addr
- * @nodes: array of drm_mm_nodes with the MC addresses
+ * @res: ttm_resource to map
  * @pages_addr: DMA addresses to use for mapping
  * @fence: optional resulting fence
+ * @table_freed: return true if page table is freed
  *
  * Fill in the page table entries between @start and @last.
  *
@@ -1622,13 +1625,14 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
                                bool unlocked, struct dma_resv *resv,
                                uint64_t start, uint64_t last,
                                uint64_t flags, uint64_t offset,
-                               struct drm_mm_node *nodes,
+                               struct ttm_resource *res,
                                dma_addr_t *pages_addr,
-                               struct dma_fence **fence)
+                               struct dma_fence **fence,
+                               bool *table_freed)
 {
        struct amdgpu_vm_update_params params;
+       struct amdgpu_res_cursor cursor;
        enum amdgpu_sync_mode sync_mode;
-       uint64_t pfn;
        int r;
 
        memset(&params, 0, sizeof(params));
@@ -1646,14 +1650,6 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
        else
                sync_mode = AMDGPU_SYNC_EXPLICIT;
 
-       pfn = offset >> PAGE_SHIFT;
-       if (nodes) {
-               while (pfn >= nodes->size) {
-                       pfn -= nodes->size;
-                       ++nodes;
-               }
-       }
-
        amdgpu_vm_eviction_lock(vm);
        if (vm->evicting) {
                r = -EBUSY;
@@ -1672,23 +1668,17 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
        if (r)
                goto error_unlock;
 
-       do {
+       amdgpu_res_first(res, offset, (last - start + 1) * AMDGPU_GPU_PAGE_SIZE,
+                        &cursor);
+       while (cursor.remaining) {
                uint64_t tmp, num_entries, addr;
 
-
-               num_entries = last - start + 1;
-               if (nodes) {
-                       addr = nodes->start << PAGE_SHIFT;
-                       num_entries = min((nodes->size - pfn) *
-                               AMDGPU_GPU_PAGES_IN_CPU_PAGE, num_entries);
-               } else {
-                       addr = 0;
-               }
-
+               num_entries = cursor.size >> AMDGPU_GPU_PAGE_SHIFT;
                if (pages_addr) {
                        bool contiguous = true;
 
                        if (num_entries > AMDGPU_GPU_PAGES_IN_CPU_PAGE) {
+                               uint64_t pfn = cursor.start >> PAGE_SHIFT;
                                uint64_t count;
 
                                contiguous = pages_addr[pfn + 1] ==
@@ -1708,16 +1698,18 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
                        }
 
                        if (!contiguous) {
-                               addr = pfn << PAGE_SHIFT;
+                               addr = cursor.start;
                                params.pages_addr = pages_addr;
                        } else {
-                               addr = pages_addr[pfn];
+                               addr = pages_addr[cursor.start >> PAGE_SHIFT];
                                params.pages_addr = NULL;
                        }
 
                } else if (flags & (AMDGPU_PTE_VALID | AMDGPU_PTE_PRT)) {
-                       addr += bo_adev->vm_manager.vram_base_offset;
-                       addr += pfn << PAGE_SHIFT;
+                       addr = bo_adev->vm_manager.vram_base_offset +
+                               cursor.start;
+               } else {
+                       addr = 0;
                }
 
                tmp = start + num_entries;
@@ -1725,17 +1717,15 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
                if (r)
                        goto error_unlock;
 
-               pfn += num_entries / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
-               if (nodes && nodes->size == pfn) {
-                       pfn = 0;
-                       ++nodes;
-               }
+               amdgpu_res_next(&cursor, num_entries * AMDGPU_GPU_PAGE_SIZE);
                start = tmp;
-
-       } while (unlikely(start != last + 1));
+       };
 
        r = vm->update_funcs->commit(&params, fence);
 
+       if (table_freed)
+               *table_freed = params.table_freed;
+
 error_unlock:
        amdgpu_vm_eviction_unlock(vm);
        return r;
@@ -1805,7 +1795,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
        struct amdgpu_bo_va_mapping *mapping;
        dma_addr_t *pages_addr = NULL;
        struct ttm_resource *mem;
-       struct drm_mm_node *nodes;
        struct dma_fence **last_update;
        struct dma_resv *resv;
        uint64_t flags;
@@ -1814,7 +1803,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
 
        if (clear || !bo) {
                mem = NULL;
-               nodes = NULL;
                resv = vm->root.base.bo->tbo.base.resv;
        } else {
                struct drm_gem_object *obj = &bo->tbo.base;
@@ -1829,7 +1817,6 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
                                bo = gem_to_amdgpu_bo(gobj);
                }
                mem = &bo->tbo.mem;
-               nodes = mem->mm_node;
                if (mem->mem_type == TTM_PL_TT)
                        pages_addr = bo->tbo.ttm->dma_address;
        }
@@ -1878,8 +1865,8 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
                r = amdgpu_vm_bo_update_mapping(adev, bo_adev, vm, false, false,
                                                resv, mapping->start,
                                                mapping->last, update_flags,
-                                               mapping->offset, nodes,
-                                               pages_addr, last_update);
+                                               mapping->offset, mem,
+                                               pages_addr, last_update, NULL);
                if (r)
                        return r;
        }
@@ -2090,7 +2077,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
                r = amdgpu_vm_bo_update_mapping(adev, adev, vm, false, false,
                                                resv, mapping->start,
                                                mapping->last, init_pte_value,
-                                               0, NULL, NULL, &f);
+                                               0, NULL, NULL, &f, NULL);
                amdgpu_vm_free_mapping(adev, vm, mapping, f);
                if (r) {
                        dma_fence_put(f);
@@ -3428,7 +3415,7 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
        }
 
        r = amdgpu_vm_bo_update_mapping(adev, adev, vm, true, false, NULL, addr,
-                                       addr, flags, value, NULL, NULL,
+                                       addr, flags, value, NULL, NULL, NULL,
                                        NULL);
        if (r)
                goto error_unlock;