Merge tag 'drm-misc-next-2021-07-16' of git://anongit.freedesktop.org/drm/drm-misc...
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ttm.c
index cdfc20b..acd95d3 100644 (file)
@@ -149,14 +149,16 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
                         * BOs to be evicted from VRAM
                         */
                        amdgpu_bo_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM |
-                                                        AMDGPU_GEM_DOMAIN_GTT);
+                                                       AMDGPU_GEM_DOMAIN_GTT |
+                                                       AMDGPU_GEM_DOMAIN_CPU);
                        abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
                        abo->placements[0].lpfn = 0;
                        abo->placement.busy_placement = &abo->placements[1];
                        abo->placement.num_busy_placement = 1;
                } else {
                        /* Move to GTT memory */
-                       amdgpu_bo_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
+                       amdgpu_bo_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT |
+                                                       AMDGPU_GEM_DOMAIN_CPU);
                }
                break;
        case TTM_PL_TT:
@@ -521,7 +523,7 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, bool evict,
                        hop->fpfn = 0;
                        hop->lpfn = 0;
                        hop->mem_type = TTM_PL_TT;
-                       hop->flags = 0;
+                       hop->flags = TTM_PL_FLAG_TEMPORARY;
                        return -EMULTIHOP;
                }
 
@@ -590,10 +592,6 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
 
                mem->bus.offset += adev->gmc.aper_base;
                mem->bus.is_iomem = true;
-               if (adev->gmc.xgmi.connected_to_cpu)
-                       mem->bus.caching = ttm_cached;
-               else
-                       mem->bus.caching = ttm_write_combined;
                break;
        default:
                return -EINVAL;
@@ -695,7 +693,7 @@ int amdgpu_ttm_tt_get_user_pages(struct amdgpu_bo *bo, struct page **pages)
        readonly = amdgpu_ttm_tt_is_readonly(ttm);
        r = amdgpu_hmm_range_get_pages(&bo->notifier, mm, pages, start,
                                       ttm->num_pages, &gtt->range, readonly,
-                                      true);
+                                      true, NULL);
 out_unlock:
        mmap_read_unlock(mm);
        mmput(mm);
@@ -923,7 +921,8 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
            bo_mem->mem_type == AMDGPU_PL_OA)
                return -EINVAL;
 
-       if (!amdgpu_gtt_mgr_has_gart_addr(bo_mem)) {
+       if (bo_mem->mem_type != TTM_PL_TT ||
+           !amdgpu_gtt_mgr_has_gart_addr(bo_mem)) {
                gtt->offset = AMDGPU_BO_INVALID_OFFSET;
                return 0;
        }