Merge drm/drm-next into drm-misc-next
[linux-2.6-microblaze.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_device.c
index bf50556..ef50b7d 100644 (file)
@@ -121,6 +121,7 @@ const char *amdgpu_asic_name[] = {
        "NAVY_FLOUNDER",
        "VANGOGH",
        "DIMGREY_CAVEFISH",
+       "BEIGE_GOBY",
        "LAST",
 };
 
@@ -1691,6 +1692,19 @@ int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
        if (!ip_block_version)
                return -EINVAL;
 
+       switch (ip_block_version->type) {
+       case AMD_IP_BLOCK_TYPE_VCN:
+               if (adev->harvest_ip_mask & AMD_HARVEST_IP_VCN_MASK)
+                       return 0;
+               break;
+       case AMD_IP_BLOCK_TYPE_JPEG:
+               if (adev->harvest_ip_mask & AMD_HARVEST_IP_JPEG_MASK)
+                       return 0;
+               break;
+       default:
+               break;
+       }
+
        DRM_INFO("add ip block number %d <%s>\n", adev->num_ip_blocks,
                  ip_block_version->funcs->name);
 
@@ -1815,6 +1829,7 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_BEIGE_GOBY:
        default:
                return 0;
        case CHIP_VEGA10:
@@ -2028,6 +2043,7 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
        case  CHIP_SIENNA_CICHLID:
        case  CHIP_NAVY_FLOUNDER:
        case  CHIP_DIMGREY_CAVEFISH:
+       case  CHIP_BEIGE_GOBY:
        case CHIP_VANGOGH:
                if (adev->asic_type == CHIP_VANGOGH)
                        adev->family = AMDGPU_FAMILY_VGH;
@@ -2870,7 +2886,7 @@ static int amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev)
                AMD_IP_BLOCK_TYPE_IH,
        };
 
-       for (i = 0; i < ARRAY_SIZE(ip_order); i++) {
+       for (i = 0; i < adev->num_ip_blocks; i++) {
                int j;
                struct amdgpu_ip_block *block;
 
@@ -3048,7 +3064,7 @@ static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
 {
        if (amdgpu_sriov_vf(adev)) {
                if (adev->is_atom_fw) {
-                       if (amdgpu_atomfirmware_gpu_supports_virtualization(adev))
+                       if (amdgpu_atomfirmware_gpu_virtualization_supported(adev))
                                adev->virt.caps |= AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
                } else {
                        if (amdgpu_atombios_has_gpu_virtualization_table(adev))
@@ -3111,6 +3127,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
        case CHIP_DIMGREY_CAVEFISH:
+       case CHIP_BEIGE_GOBY:
        case CHIP_VANGOGH:
 #endif
                return amdgpu_dc != 0;
@@ -3138,7 +3155,6 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
        return amdgpu_device_asic_has_dc_support(adev->asic_type);
 }
 
-
 static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
 {
        struct amdgpu_device *adev =
@@ -3194,8 +3210,8 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev)
        int ret = 0;
 
        /*
-        * By default timeout for non compute jobs is 10000.
-        * And there is no timeout enforced on compute jobs.
+        * By default timeout for non compute jobs is 10000
+        * and 60000 for compute jobs.
         * In SR-IOV or passthrough mode, timeout for compute
         * jobs are 60000 by default.
         */
@@ -3204,10 +3220,8 @@ static int amdgpu_device_get_job_timeout_settings(struct amdgpu_device *adev)
        if (amdgpu_sriov_vf(adev))
                adev->compute_timeout = amdgpu_sriov_is_pp_one_vf(adev) ?
                                        msecs_to_jiffies(60000) : msecs_to_jiffies(10000);
-       else if (amdgpu_passthrough(adev))
-               adev->compute_timeout =  msecs_to_jiffies(60000);
        else
-               adev->compute_timeout = MAX_SCHEDULE_TIMEOUT;
+               adev->compute_timeout =  msecs_to_jiffies(60000);
 
        if (strnlen(input, AMDGPU_MAX_TIMEOUT_PARAM_LENGTH)) {
                while ((timeout_setting = strsep(&input, ",")) &&
@@ -3302,6 +3316,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        adev->vm_manager.vm_pte_funcs = NULL;
        adev->vm_manager.vm_pte_num_scheds = 0;
        adev->gmc.gmc_funcs = NULL;
+       adev->harvest_ip_mask = 0x0;
        adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS);
        bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
 
@@ -3787,7 +3802,6 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
 int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
 {
        struct amdgpu_device *adev = drm_to_adev(dev);
-       int r;
 
        if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
                return 0;
@@ -3802,7 +3816,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
 
        amdgpu_ras_suspend(adev);
 
-       r = amdgpu_device_ip_suspend_phase1(adev);
+       amdgpu_device_ip_suspend_phase1(adev);
 
        if (!adev->in_s0ix)
                amdgpu_amdkfd_suspend(adev, adev->in_runpm);
@@ -3812,7 +3826,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
 
        amdgpu_fence_driver_suspend(adev);
 
-       r = amdgpu_device_ip_suspend_phase2(adev);
+       amdgpu_device_ip_suspend_phase2(adev);
        /* evict remaining vram memory
         * This second call to evict vram is to evict the gart page table
         * using the CPU.
@@ -4525,7 +4539,6 @@ out:
                        r = amdgpu_ib_ring_tests(tmp_adev);
                        if (r) {
                                dev_err(tmp_adev->dev, "ib ring test failed (%d).\n", r);
-                               r = amdgpu_device_ip_suspend(tmp_adev);
                                need_full_reset = true;
                                r = -EAGAIN;
                                goto end;
@@ -5170,7 +5183,8 @@ int amdgpu_device_baco_enter(struct drm_device *dev)
        if (!amdgpu_device_supports_baco(adev_to_drm(adev)))
                return -ENOTSUPP;
 
-       if (ras && ras->supported && adev->nbio.funcs->enable_doorbell_interrupt)
+       if (ras && adev->ras_enabled &&
+           adev->nbio.funcs->enable_doorbell_interrupt)
                adev->nbio.funcs->enable_doorbell_interrupt(adev, false);
 
        return amdgpu_dpm_baco_enter(adev);
@@ -5189,7 +5203,8 @@ int amdgpu_device_baco_exit(struct drm_device *dev)
        if (ret)
                return ret;
 
-       if (ras && ras->supported && adev->nbio.funcs->enable_doorbell_interrupt)
+       if (ras && adev->ras_enabled &&
+           adev->nbio.funcs->enable_doorbell_interrupt)
                adev->nbio.funcs->enable_doorbell_interrupt(adev, true);
 
        return 0;