Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[linux-2.6-microblaze.git] / drivers / clocksource / ingenic-sysost.c

diff --git a/drivers/clocksource/ingenic-sysost.c b/drivers/clocksource/ingenic-sysost.c
index a129840..cb6fc2f 100644 (file)
--- a/drivers/clocksource/ingenic-sysost.c
+++ b/drivers/clocksource/ingenic-sysost.c
@@ -4,6 +4,7 @@
  * Copyright (c) 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
  */
 
+#include <linux/bitfield.h>
 #include <linux/bitops.h>
 #include <linux/clk.h>
 #include <linux/clk-provider.h>
@@ -34,8 +35,6 @@
 /* bits within the OSTCCR register */
 #define OSTCCR_PRESCALE1_MASK  0x3
 #define OSTCCR_PRESCALE2_MASK  0xc
-#define OSTCCR_PRESCALE1_LSB   0
-#define OSTCCR_PRESCALE2_LSB   2
 
 /* bits within the OSTCR register */
 #define OSTCR_OST1CLR                  BIT(0)
@@ -98,7 +97,7 @@ static unsigned long ingenic_ost_percpu_timer_recalc_rate(struct clk_hw *hw,
 
        prescale = readl(ost_clk->ost->base + info->ostccr_reg);
 
-       prescale = (prescale & OSTCCR_PRESCALE1_MASK) >> OSTCCR_PRESCALE1_LSB;
+       prescale = FIELD_GET(OSTCCR_PRESCALE1_MASK, prescale);
 
        return parent_rate >> (prescale * 2);
 }
@@ -112,7 +111,7 @@ static unsigned long ingenic_ost_global_timer_recalc_rate(struct clk_hw *hw,
 
        prescale = readl(ost_clk->ost->base + info->ostccr_reg);
 
-       prescale = (prescale & OSTCCR_PRESCALE2_MASK) >> OSTCCR_PRESCALE2_LSB;
+       prescale = FIELD_GET(OSTCCR_PRESCALE2_MASK, prescale);
 
        return parent_rate >> (prescale * 2);
 }
@@ -151,7 +150,8 @@ static int ingenic_ost_percpu_timer_set_rate(struct clk_hw *hw, unsigned long re
        int val;
 
        val = readl(ost_clk->ost->base + info->ostccr_reg);
-       val = (val & ~OSTCCR_PRESCALE1_MASK) | (prescale << OSTCCR_PRESCALE1_LSB);
+       val &= ~OSTCCR_PRESCALE1_MASK;
+       val |= FIELD_PREP(OSTCCR_PRESCALE1_MASK, prescale);
        writel(val, ost_clk->ost->base + info->ostccr_reg);
 
        return 0;
@@ -166,7 +166,8 @@ static int ingenic_ost_global_timer_set_rate(struct clk_hw *hw, unsigned long re
        int val;
 
        val = readl(ost_clk->ost->base + info->ostccr_reg);
-       val = (val & ~OSTCCR_PRESCALE2_MASK) | (prescale << OSTCCR_PRESCALE2_LSB);
+       val &= ~OSTCCR_PRESCALE2_MASK;
+       val |= FIELD_PREP(OSTCCR_PRESCALE2_MASK, prescale);
        writel(val, ost_clk->ost->base + info->ostccr_reg);
 
        return 0;